Shade: a fast instruction-set simulator for execution profiling
SIGMETRICS '94 Proceedings of the 1994 ACM SIGMETRICS conference on Measurement and modeling of computer systems
The Omega Library interface guide
The Omega Library interface guide
Data-centric multi-level blocking
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design
Efficient Utilization of Scratch-Pad Memory in Embedded Processor Applications
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Polynomial-time algorithm for on-chip scratchpad memory partitioning
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Fast, predictable and low energy memory references through architecture-aware compilation
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Dynamic overlay of scratchpad memory for energy minimization
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A post-compiler approach to scratchpad mapping of code
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
A novel instruction scratchpad memory optimization method based on concomitance metric
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Analysis of scratch-pad and data-cache performance using statistical methods
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Recursive function data allocation to scratch-pad memory
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
Scratchpad allocation for concurrent embedded software
ACM Transactions on Programming Languages and Systems (TOPLAS)
A hardware/software framework for instruction and data scratchpad memory allocation
ACM Transactions on Architecture and Code Optimization (TACO)
Power efficient instruction caches for embedded systems
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Memory power optimization of Java-based embedded systems exploiting garbage collection information
Journal of Systems Architecture: the EUROMICRO Journal
Write activity reduction on non-volatile main memories for embedded chip multiprocessors
ACM Transactions on Embedded Computing Systems (TECS)
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Effective utilization of on-chip storage space is important from both performance (execution cycles)and memory system energy consumptions perspectives. While on-chip cache memories have been widely used in the past, several factors, including lack of data access time predictability and limited effectiveness of compiler optimizations, indicate that they may not be the best candidate for portable/embedded devices. This paper presents a compiler-directed on-chip scratch-pad memory (software-managed on-chip memory) management strategy for data accesses. Our strategy is oriented towards minimizing the number of data transfers between off-chip memory and the scratch-pad memory, thereby exploiting reuse for the data residing in the scratch-pad memory. We report experimental data from our implementation showing the usefulness of our technique.