Proceedings of the 11th international symposium on System synthesis
Hardware synthesis from C/C++ models
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Global multimedia system design exploration using accurate memory organization feedback
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Implementation of a scalable MPEG-4 wavelet-based visual texture compression system
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Energy efficient data transfer and storage organization for a MAP turbo decoder module
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Journal of VLSI Signal Processing Systems - Special issue on system level design
Journal of VLSI Signal Processing Systems - Special issue on the 1997 IEEE workshop on signal processing systems (SiPS): design and implementation
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
A Scalable Architecture for MPEG-4 Wavelet Quantization
Journal of VLSI Signal Processing Systems - Special issue on implementation of MPEG-4 multimedia codecs
System-level power optimization: techniques and tools
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Interactive co-design of high throughput embedded multimedia
Proceedings of the 37th Annual Design Automation Conference
System-level data format exploration for dynamically allocated data structures
Proceedings of the 37th Annual Design Automation Conference
Energy-driven integrated hardware-software optimizations using SimplePower
Proceedings of the 27th annual international symposium on Computer architecture
Analysis of high-level address code transformations for programmable processors
DATE '00 Proceedings of the conference on Design, automation and test in Europe
DATE '00 Proceedings of the conference on Design, automation and test in Europe
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A recursive algorithm for low-power memory partitioning
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Memory system energy (poster session): influence of hardware-software optimizations
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Journal of VLSI Signal Processing Systems
Low-power systems on chips (SOCs)
Proceedings of the conference on Design, automation and test in Europe
A decade of reconfigurable computing: a visionary retrospective
Proceedings of the conference on Design, automation and test in Europe
Hierarchical memory mapping during synthesis in FPGA-based reconfigurable computers
Proceedings of the conference on Design, automation and test in Europe
Cache conscious data layout organization for embedded multimedia applications
Proceedings of the conference on Design, automation and test in Europe
Access pattern based local memory customization for low power embedded systems
Proceedings of the conference on Design, automation and test in Europe
Static memory allocation by pointer analysis and coloring
Proceedings of the conference on Design, automation and test in Europe
New directions in compiler technology for embedded systems (embedded tutorial)
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Compiler-directed selection of dynamic memory layouts
Proceedings of the ninth international symposium on Hardware/software codesign
Data and memory optimization techniques for embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Reducing memory requirements of nested loops for embedded systems
Proceedings of the 38th annual Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
Dynamic management of scratch-pad memory space
Proceedings of the 38th annual Design Automation Conference
From architecture to layout: partitioned memory synthesis for embedded systems-on-chip
Proceedings of the 38th annual Design Automation Conference
Morphable Cache Architectures: Potential Benefits
OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
Exploiting scratch-pad memory using Presburger formulas
Proceedings of the 14th international symposium on Systems synthesis
System-level interconnect architecture exploration for custom memory organizations
Proceedings of the 14th international symposium on Systems synthesis
An optimal memory allocation for application-specific multiprocessor system-on-chip
Proceedings of the 14th international symposium on Systems synthesis
APEX: access pattern based memory architecture exploration
Proceedings of the 14th international symposium on Systems synthesis
Cache-efficient memory layout of aggregate data structures
Proceedings of the 14th international symposium on Systems synthesis
Source code transformation based on software cost analysis
Proceedings of the 14th international symposium on Systems synthesis
Systematic data reuse exploration methodology for irregular access patterns
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Low power storage cycle budget distribution tool support for hierarchical graphs
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Data memory design and exploration for low-power embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Energy-efficient instruction cache using page-based placement
CASES '01 Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
Synthesis of hardware models in C with pointers and complex data structures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Hardware and Software Techniques for Controlling DRAM Power Modes
IEEE Transactions on Computers
Characterization of memory energy behavior
Workload characterization of emerging computer applications
Layout-driven memory synthesis for embedded systems-on-chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design space optimization of embedded memory systems via data remapping
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Automatic data migration for reducing energy consumption in multi-bank memory systems
Proceedings of the 39th annual Design Automation Conference
Exploiting shared scratch pad memory space in embedded multiprocessor systems
Proceedings of the 39th annual Design Automation Conference
Complex library mapping for embedded software using symbolic algebra
Proceedings of the 39th annual Design Automation Conference
Automatic generation of embedded memory wrapper for multiprocessor SoC
Proceedings of the 39th annual Design Automation Conference
Compiler-directed scratch pad memory hierarchy design and management
Proceedings of the 39th annual Design Automation Conference
Unlocking the design secrets of a 2.29 Gb/s Rijndael processor
Proceedings of the 39th annual Design Automation Conference
Scheduler-based DRAM energy management
Proceedings of the 39th annual Design Automation Conference
Low-power approach for decoding convolutional codes with adaptive viterbi algorithm approximations
Proceedings of the 2002 international symposium on Low power electronics and design
Proceedings of the 2002 international symposium on Low power electronics and design
Reducing access energy of on-chip data memory considering active data bitwidth
Proceedings of the 2002 international symposium on Low power electronics and design
Memory Design and Exploration for Low Power, Embedded Systems
Journal of VLSI Signal Processing Systems - Special issue on signal processing systems design and implementation
Energy/power estimation of regular processor arrays
Proceedings of the 15th international symposium on System Synthesis
Optimizing inter-nest data locality
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Tuning garbage collection for reducing memory system energy in an embedded java environment
ACM Transactions on Embedded Computing Systems (TECS)
System-level exploration of association table implementations in telecom network applications
ACM Transactions on Embedded Computing Systems (TECS)
WOSP '02 Proceedings of the 3rd international workshop on Software and performance
Automated data dependency size estimation with a partially fixed execution ordering
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
MIST: an algorithm for memory miss traffic management
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Improving memory energy using access pattern classification
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Color permutation: an iterative algorithm for memory packing
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Access pattern-based memory and connectivity architecture exploration
ACM Transactions on Embedded Computing Systems (TECS)
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Energy Metric for Software Systems
Software Quality Control
Memory Power Reduction for High-Speed Implementation of Turbo Codes
Journal of VLSI Signal Processing Systems
Design Challenges for New Application-Specific Processors
IEEE Design & Test
Data Memory Organization and Optimizations in Application-Specific Systems
IEEE Design & Test
Global interconnect trade-off for technology over memory modules to application level: case study
Proceedings of the 2003 international workshop on System-level interconnect prediction
Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework
IEEE Transactions on Computers
Partitioned instruction cache architecture for energy efficiency
ACM Transactions on Embedded Computing Systems (TECS)
Data remapping for design space optimization of embedded memory systems
ACM Transactions on Embedded Computing Systems (TECS)
HiPC '00 Proceedings of the 7th International Conference on High Performance Computing
Influence of Array Allocation Mechanisms on Memory System Energy
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Advanced Data Layout Optimization for Multimedia Applications
IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing
Global memory mapping for FPGA-based reconfigurable systems
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Dynamic Memory Oriented Transformations in the MPEG4 IM1-Player on a Low Power Platform
PACS '00 Proceedings of the First International Workshop on Power-Aware Computer Systems-Revised Papers
Storage Size Reduction by In-place Mapping of Arrays
VMCAI '02 Revised Papers from the Third International Workshop on Verification, Model Checking, and Abstract Interpretation
Ada-Europe '02 Proceedings of the 7th Ada-Europe International Conference on Reliable Software Technologies
Tiling and Memory Reuse for Sequences of Nested Loops
Euro-Par '02 Proceedings of the 8th International Euro-Par Conference on Parallel Processing
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Enhancing Compiler Techniques for Memory Energy Optimizations
EMSOFT '02 Proceedings of the Second International Conference on Embedded Software
Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications
PATMOS '00 Proceedings of the 10th International Workshop on Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation
Cost-Efficient C-Level Design of an MPEG-4 Video Decoder
PATMOS '00 Proceedings of the 10th International Workshop on Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation
Influence of Loop Optimizations on Energy Consumption of Multi-bank Memory Systems
CC '02 Proceedings of the 11th International Conference on Compiler Construction
CRISP: A Template for Reconfigurable Instruction Set Processors
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Practical parallel computing
High-Level Cache Modeling for 2-D Discrete Wavelet Transform Implementations
Journal of VLSI Signal Processing Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
High-level synthesis of distributed logic-memory architectures
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Energy savings through compression in embedded Java environments
Proceedings of the tenth international symposium on Hardware/software codesign
Locality-conscious process scheduling in embedded systems
Proceedings of the tenth international symposium on Hardware/software codesign
Three-dimensional memory vectorization for high bandwidth media memory systems
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Generating physical addresses directly for saving instruction TLB energy
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Power protocol: reducing power dissipation on off-chip data buses
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Xtream-Fit: an energy-delay efficient data memory subsystem for embedded media processing
Proceedings of the 40th annual Design Automation Conference
Proceedings of the 40th annual Design Automation Conference
Proceedings of the 40th annual Design Automation Conference
Advanced copy propagation for arrays
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Compiler optimizations for low power systems
Power aware computing
Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Strategies for Improving Data Locality in Embedded Applications
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Address Code and Arithmetic Optimizations for Embedded Systems
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Memory Hierarchy Optimization of Multimedia Applications on Programmable Embedded Cores 1
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Estimating influence of data layout optimizations on SDRAM energy consumption
Proceedings of the 2003 international symposium on Low power electronics and design
Exploiting bank locality in multi-bank memories
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Array Regrouping and Its Use in Compiling Data-Intensive Embedded Applications
IEEE Transactions on Computers
Low-power design of turbo decoder with exploration of energy-throughput trade-off
Compilers and operating systems for low power
Proceedings of the 2004 ACM symposium on Applied computing
Synthesis of Partitioned Shared Memory Architectures for Energy-Efficient Multi-Processor SoC
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Power Aware Variable Partitioning and Instruction Scheduling for Multiple Memory Banks
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Power Aware Interface Synthesis for Bus-Based SoC Designs
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Instruction Scheduling for Low Power
Journal of VLSI Signal Processing Systems
Access Pattern Restructuring for Memory Energy
IEEE Transactions on Parallel and Distributed Systems
Processor-memory coexploration using an architecture description language
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the 1st conference on Computing frontiers
The digital divide of computing
Proceedings of the 1st conference on Computing frontiers
The happy marriage of architecture and application in next-generation reconfigurable systems
Proceedings of the 1st conference on Computing frontiers
Storage requirement estimation for optimized design of data intensive applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An integrated hardware/software approach for run-time scratchpad management
Proceedings of the 41st annual Design Automation Conference
Virtual memory window for application-specific reconfigurable coprocessors
Proceedings of the 41st annual Design Automation Conference
Synthesis of Heterogeneous Distributed Architectures for Memory-Intensive Applications
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Array Composition and Decomposition for Optimizing Embedded Applications
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Hardware/Software Design Space Exploration for a Reconfigurable Processor
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
An Integrated Approach for Improving Cache Behavior
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Generalized Data Transformations for Enhancing Cache Behavior
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Dynamic on-chip memory management for chip multiprocessors
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
Translating affine nested-loop programs to process networks
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
Dynamic tracking of page miss ratio curve for memory management
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Dynamic voltage scheduling with buffers in low-power multimedia applications
ACM Transactions on Embedded Computing Systems (TECS)
Journal of VLSI Signal Processing Systems
IEEE Transactions on Computers
Challenges in Embedded Memory Design and Test
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Nonuniform Banking for Reducing Memory Energy Consumption
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Studying Storage-Recomputation Tradeoffs in Memory-Constrained Embedded Processing
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Compiler-Based Approach for Exploiting Scratch-Pad in Presence of Irregular Array Access
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Integer linear programming based energy optimization for banked DRAMs
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Energy management in software-controlled multi-level memory hierarchies
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Using data compression in an MPSoC architecture for improving performance
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Power and Performance Analysis of Motion Estimation Based on Hardware and Software Realizations
IEEE Transactions on Computers
Optimizing instruction TLB energy using software and hardware techniques
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Energy-aware variable partitioning and instruction scheduling for multibank memory architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Locality-conscious workload assignment for array-based computations in MPSOC architectures
Proceedings of the 42nd annual Design Automation Conference
Data space-oriented tiling for enhancing locality
ACM Transactions on Embedded Computing Systems (TECS)
Exploiting Inter-Processor Data Sharing for Improving Behavior of Multi-Processor SoCs
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
A tunable bus encoder for off-chip data buses
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
Enabling unrestricted automated synthesis of portable hardware accelerators for virtual machines
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Skiing the embedded systems mountain
ACM Transactions on Embedded Computing Systems (TECS)
VALVE: Variable Length Value Encoder for Off-Chip Data Buses.
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Energy aware memory architecture configuration
MEDEA '04 Proceedings of the 2004 workshop on MEmory performance: DEaling with Applications , systems and architecture
DRAMsim: a memory system simulator
ACM SIGARCH Computer Architecture News - Special issue: dasCMP'05
Compiler-directed high-level energy estimation and optimization
ACM Transactions on Embedded Computing Systems (TECS)
Automatic functional verification of memory oriented global source code transformations
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture
Proceedings of the 2006 international workshop on System-level interconnect prediction
Optimal topology exploration for application-specific 3D architectures
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Hierarchical memory size estimation for loop fusion and loop shifting in data-dominated applications
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Memory size computation for multimedia processing applications
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Analysis of scratch-pad and data-cache performance using statistical methods
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Memory access pattern analysis and stream cache design for multimedia applications
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
On combining iteration space tiling with data space tiling for scratch-pad memory systems
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Customized on-chip memories for embedded chip multiprocessors
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Improving the energy behavior of block buffering using compiler optimizations
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Shared Scratch-Pad Memory Space Management
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Code restructuring for improving cache performance of MPSoCs
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Integrating loop and data optimizations for locality within a constraint network based framework
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
ASIP design and synthesis for non linear filtering in image processing
Proceedings of the conference on Design, automation and test in Europe: Designers' forum
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Impact of bit-width specification on the memory hierarchy for a real-time video processing system
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Memory centric thread synchronization on platform FPGAs
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Reducing dynamic and leakage energy in VLIW architectures
ACM Transactions on Embedded Computing Systems (TECS)
A formal method for hardware IP design and integration under I/O and timing constraints
ACM Transactions on Embedded Computing Systems (TECS)
Journal of Systems and Software
Journal of VLSI Signal Processing Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Multi-Level On-Chip Memory Hierarchy Design for Embedded Chip Multiprocessors
ICPADS '06 Proceedings of the 12th International Conference on Parallel and Distributed Systems - Volume 1
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Dynamic power management of DRAM using accessed physical addresses
Microprocessors & Microsystems
Cache miss clustering for banked memory systems
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Optimal memoryless encoding for low power off-chip data buses
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Formal model of data reuse analysis for hierarchical memory organizations
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Optimized memory requirements for wavelet-based scalable multimedia codecs
Journal of Embedded Computing - Low-power Embedded Systems
Journal of Systems Architecture: the EUROMICRO Journal
Optimizing data structures at the modeling level in embedded multimedia
Journal of Systems Architecture: the EUROMICRO Journal
Compiler-Directed Variable Latency Aware SPM Management to CopeWith Timing Problems
Proceedings of the International Symposium on Code Generation and Optimization
External memory page remapping for embedded multimedia systems
Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Mapping multi-dimensional signals into hierarchical memory organizations
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe
Energy behavior of java applications from the memory perspective
JVM'01 Proceedings of the 2001 Symposium on JavaTM Virtual Machine Research and Technology Symposium - Volume 1
Systematic intermediate sequence removal for reduced memory accesses
SCOPES '07 Proceedingsof the 10th international workshop on Software & compilers for embedded systems
A practical dynamic single assignment transformation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
MPSoC memory optimization using program transformation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Incremental hierarchical memory size estimation for steering of loop transformations
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Energy-efficient channel estimation in MIMO systems
EURASIP Journal on Wireless Communications and Networking
EURASIP Journal on Embedded Systems
A systematic approach to design low-power video codec cores
EURASIP Journal on Embedded Systems
SPRINT: a tool to generate concurrent transaction-level models from sequential code
EURASIP Journal on Applied Signal Processing
EURASIP Journal on Applied Signal Processing
Design of a low-power VLSI macrocell for nonlinear adaptive video noise reduction
EURASIP Journal on Applied Signal Processing
Buffer and Register Allocation for Memory Space Optimization
Journal of VLSI Signal Processing Systems
Computation of storage requirements for multi-dimensional signal processing applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Mapping model with inter-array memory sharing for multidimensional signal processing
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Code-size conscious pipelining of imperfectly nested loops
MEDEA '07 Proceedings of the 2007 workshop on MEmory performance: DEaling with Applications, systems and architecture
Energy minimization with loop fusion and multi-functional-unit scheduling for multidimensional DSP
Journal of Parallel and Distributed Computing
Optimization of memory system in real-time embedded systems
ICCOMP'07 Proceedings of the 11th WSEAS International Conference on Computers
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
ILP-Based energy minimization techniques for banked memories
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Integrated Computer-Aided Engineering
Quality-driven model-based architecture synthesis for real-time embedded SoCs
Journal of Systems Architecture: the EUROMICRO Journal
Impact of JVM superoperators on energy consumption in resource-constrained embedded systems
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Science of Computer Programming
Journal of Systems Architecture: the EUROMICRO Journal
Journal of Signal Processing Systems
Guidance of Loop Ordering for Reduced Memory Usage in Signal Processing Applications
Journal of Signal Processing Systems
Energy-efficient encoding techniques for off-chip data buses
ACM Transactions on Embedded Computing Systems (TECS)
Efficient measurement of data flow enabling communication-aware parallelisation
IFMT '08 Proceedings of the 1st international forum on Next-generation multicore/manycore technologies
Embedded DSP Processor Design: Application Specific Instruction Set Processors
Embedded DSP Processor Design: Application Specific Instruction Set Processors
A framework for low energy data management in reconfigurable multi-context architectures
Journal of Systems Architecture: the EUROMICRO Journal
Reducing memory requirements of resource-constrained applications
ACM Transactions on Embedded Computing Systems (TECS)
Accuracy-aware SRAM: a reconfigurable low power SRAM architecture for mobile multimedia applications
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Parallel Architecture for 2-D Discrete Wavelet Transform with Low Energy Consumption
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Teaching skills and concepts for embedded systems design
ACM SIGBED Review
Loop scheduling and bank type assignment for heterogeneous multi-bank memory
Journal of Parallel and Distributed Computing
Energy/area/delay tradeoffs in the physical design of on-chip segmented bus architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Multiprocessor, Multithreading and Memory Optimization for On-Chip Multimedia Applications
Journal of Signal Processing Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An outlook on design technologies for future integrated systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Using data compression for increasing memory system utilization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Journal of Embedded Computing - PATMOS 2007 selected papers on low power electronics
ACM Transactions on Embedded Computing Systems (TECS)
Formally Specifying Dynamic Data Structures for Embedded Software Design: an Initial Approach
Electronic Notes in Theoretical Computer Science (ENTCS)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A 2-DDWT parallel architecture fully exploiting DRAM burst accesses
SPPRA '08 Proceedings of the Fifth IASTED International Conference on Signal Processing, Pattern Recognition and Applications
Loop transformations for reducing data space requirements of resource-constrained applications
SAS'03 Proceedings of the 10th international conference on Static analysis
Improving data locality by chunking
CC'03 Proceedings of the 12th international conference on Compiler construction
Combining optimizations in automated low power design
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the Conference on Design, Automation and Test in Europe
Data locality and parallelism optimization using a constraint-based approach
Journal of Parallel and Distributed Computing
Variable assignment and instruction scheduling for processor with multi-module memory
Microprocessors & Microsystems
Compiler-guided leakage optimization for banked scratch-pad memories
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Area-efficient high-throughput MAP decoder architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Memory-access-aware data structure transformations for embedded software with dynamic data accesses
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2002 international symposium on low-power electronics and design (ISLPED)
Loop Distribution and Fusion with Timing and Code Size Optimization
Journal of Signal Processing Systems
Layered Green Performance Indicators
Future Generation Computer Systems
Transformation to dynamic single assignment using a simple data flow analysis
APLAS'05 Proceedings of the Third Asian conference on Programming Languages and Systems
Multi-granularity noc simulation framework for early phase exploration of SDR hardware platforms
PATMOS'09 Proceedings of the 19th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Combined loop transformation and hierarchy allocation for data reuse optimization
Proceedings of the International Conference on Computer-Aided Design
Verification of source code transformations by program equivalence checking
CC'05 Proceedings of the 14th international conference on Compiler Construction
Embedded Systems Design
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Memory hierarchy energy cost of a direct filtering implementation of the wavelet transform
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Improving the memory bandwidth utilization using loop transformations
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
ESL Design and Verification: A Prescription for Electronic System Level Methodology
ESL Design and Verification: A Prescription for Electronic System Level Methodology
Context-independent codes for off-chip interconnects
PACS'04 Proceedings of the 4th international conference on Power-Aware Computer Systems
VoCS'08 Proceedings of the 2008 international conference on Visions of Computer Science: BCS International Academic Conference
Optimizing memory hierarchy allocation with loop transformations for high-level synthesis
Proceedings of the 49th Annual Design Automation Conference
Integrating Memory Optimization with Mapping Algorithms for Multi-Processors System-on-Chip
ACM Transactions on Embedded Computing Systems (TECS)
Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
Improving last level cache locality by integrating loop and data transformations
Proceedings of the International Conference on Computer-Aided Design
Polyhedral-based data reuse optimization for configurable computing
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Euro-Par'12 Proceedings of the 18th international conference on Parallel processing workshops
XDRA: exploration and optimization of last-level cache for energy reduction in DDR DRAMs
Proceedings of the 50th Annual Design Automation Conference
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Microprocessors & Microsystems
A scalable and near-optimal representation of access schemes for memory management
ACM Transactions on Architecture and Code Optimization (TACO)
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From the Publisher:This book grants the reader a comprehensive overview of the state-of-the-art in system-level memory management (data transfer and storage) related issues for complex data-dominated real-time signal and data processing applications. The authors introduce their own system-level data transfer and storage exploration methodology for data-dominated video applications. This methodology tackles the power and area reduction cost components in the architecture for this target domain, namely the system-level busses and the background memories. For the most critical tasks in the methodology, prototype tools have been developed to reduce the design time. To the researcher the book will serve as an excellent reference source, both for the overall description of the methodology and for the detailed descriptions of the system-level methodologies and synthesis techniques and algorithms. To the design engineers and CAD managers it offers an invaluable insight into the anticipated evolution of commercially available design tools as well as allowing them to utilize the book's concepts in their own research and development.