Data and computation transformations for multiprocessors
PPOPP '95 Proceedings of the fifth ACM SIGPLAN symposium on Principles and practice of parallel programming
Low-power architectural design methodologies
Low-power architectural design methodologies
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Journal of VLSI Signal Processing Systems - Special issue on technologies for wireless computing
Instruction level power analysis and optimization of software
Journal of VLSI Signal Processing Systems - Special issue on technologies for wireless computing
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ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
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ISSS '97 Proceedings of the 10th international symposium on System synthesis
Formalized methodology for data reuse exploration in hierarchical memory mappings
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Computer architecture (2nd ed.): a quantitative approach
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design
System-Level Memory Management for Weakly Parallel Image Processing
Euro-Par '96 Proceedings of the Second International Euro-Par Conference on Parallel Processing-Volume II
Automatic data mapping of signal processing applications
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
MTDT '95 Proceedings of the 1995 IEEE International Workshop on Memory Technology, Design and Testing
IEEE Transactions on Circuits and Systems for Video Technology
IEEE Transactions on Circuits and Systems for Video Technology
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Practical parallel computing
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
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Program transformations are a powerful way of optimizinggiven applications for lower power and higher performance. In thispaper, we explore avenues for power reduction by programtransformations using the real-time constraints. In the sequel,we discuss the effects of our methodology, for optimization of power,on cache related performance aspects. Our target applications are inthe real-time multimedia applications domain implemented onprogrammable multimedia or DSP processors. The effectiveness of ourapproach in obtaining a low power implementation and real-timeperformance is illustrated on three real-life applications, viz. aMPEG-2 decoder, a QSDPCM video codec and a Voicecoder application.Our experimental results indeed show that we are able to obtain lowerpower and still achieve a real-time performance.