Hierarchical algorithms for assessing probabilistic constraints on system performance
DAC '98 Proceedings of the 35th annual Design Automation Conference
System-Level Power Optimization of Video Codecs on Embedded Cores: A Systematic Approach
Journal of VLSI Signal Processing Systems - Special issue on future directions in the design and implementations of DSP systems
An Algorithm-Hardware-System Approach to VLIW Multimedia Processors
Journal of VLSI Signal Processing Systems - special issue on multimedia signal processing
Multimedia Signal Processors: An Architectural Platform with Algorithmic Compilation
Journal of VLSI Signal Processing Systems - special issue on multimedia signal processing
Journal of VLSI Signal Processing Systems - Special issue on the 1997 IEEE workshop on signal processing systems (SiPS): design and implementation
Instruction Set Extensions for MPEG-4 Video
Journal of VLSI Signal Processing Systems - Special issue on implementation of MPEG-4 multimedia codecs
Architectural approaches for video compression
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
The berkeley software MPEG-1 video decoder
ACM Transactions on Multimedia Computing, Communications, and Applications (TOMCCAP)
PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing
Journal of VLSI Signal Processing Systems
VLSI architecture design approaches for real-time video processing
WSEAS Transactions on Circuits and Systems
ICC'08 Proceedings of the 12th WSEAS international conference on Circuits
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Traditional video decoders require use of specially designed video decompression processors. We present novel algorithmic and architectural enhancements that allowed for the first time the real-time decompression of MPEG-1 video and audio streams on a low-end, general purpose RISC processor. For video decompression, efficient algorithmic implementations were derived by examining the Huffman decoder, the inverse quantizer and the inverse DCT as a single system. For audio decompression, a new DCT based implementation of the subband filtering operation yields 30% speed improvement in the audio decoding process and 17% speed improvement in overall audio and video decoding. Besides algorithmic enhancements, a new set of “multimedia” instructions and minor changes in the design of a traditional RISC ALU allowed increased parallelism of pixel-based operations with minimal design and control overhead. Experimental results show that with the synergistic combination of algorithmic and architectural enhancements a multimedia-enhanced RISC processor can achieve higher decoding rates than generic RISC and CISC processors, even when these processors operate at higher clock rates and have larger instruction and data caches