Design of a low-power VLSI macrocell for nonlinear adaptive video noise reduction

Authors:
Sergio Saponara;Luca Fanucci;Pierangelo Terreni
Affiliations:
Department of Information Engineering, University of Pisa, Italy;Institute of Electronics, Information Engineering and Telecommunications, National Research Council, Pisa, Italy;Department of Information Engineering, University of Pisa, Pisa, Italy
Venue:
EURASIP Journal on Applied Signal Processing
Year:
2004

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Abstract

A VLSI macrocell for edge-preserving video noise reduction is proposed in the paper. It is based on a nonlinear rational filter enhanced by a noise estimator for blind and dynamic adaptation of the filtering parameters to the input signal statistics. The VLSI filter features a modular architecture allowing the extension of both mask size and filtering directions. Both spatial and spatiotemporal algorithms are supported. Simulation results with monochrome test videos prove its efficiency for many noise distributions with PSNR improvements up to 3.8 dB with respect to a nonadaptive solution. The VLSI macrocell has been realized in a 0.18 µm CMOS technology using a standard-cells library; it allows for real-time processing of main video formats, up to 30 fps (frames per second) 4CIF, with a power consumption in the order of few mW.