System-Level Power Optimization of Video Codecs on Embedded Cores: A Systematic Approach
Journal of VLSI Signal Processing Systems - Special issue on future directions in the design and implementations of DSP systems
DirectX, RDX, RSX, and MMX Technology: A Jumpstart Guide to High Performance APIs
DirectX, RDX, RSX, and MMX Technology: A Jumpstart Guide to High Performance APIs
Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design
On Speed Optimization of MPEG-4 Decoder for Real-Time Multimedia Applications
ICCIMA '99 Proceedings of the 3rd International Conference on Computational Intelligence and Multimedia Applications
MPEG-4 Video Decoder Optimization
ICMCS '99 Proceedings of the IEEE International Conference on Multimedia Computing and Systems - Volume 2
ESVD: an integrated energy scalable framework for low-power video decoding systems
EURASIP Journal on Wireless Communications and Networking - Special issue on multimedia communications over next generation wireless networks
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Advanced multimedia systems intrinsically have a high memory cost, making the design of high performance, low power solutions a real challenge. Rather than spending most effort on implementation platform dependent optimization steps, we advocate a methodology and tool that involve C-level platform independent optimizations. This approach is applied to an MPEG-4 video decoder, leading to high performance, reusable C code. When mapped on (embedded) processors, this allows for lower clock rates, enabling low power realizations.