Advanced compiler optimizations for supercomputers
Communications of the ACM - Special issue on parallelism
Strategies for cache and local memory management by global program transformation
Journal of Parallel and Distributed Computing - Special Issue on Languages, Compilers and environments for Parallel Programming
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
A data locality optimizing algorithm
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
Eliminating Interlocks in Deeply Pipelined Processors by Delay Enforced Multistreaming
IEEE Transactions on Computers
Access normalization: loop restructuring for NUMA compilers
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
Proceedings of the international workshop on Algorithms and parallel VLSI architectures II
The Alpha du Centaur experiment
Proceedings of the international workshop on Algorithms and parallel VLSI architectures II
IEEE Transactions on Computers
Experiences using the ParaScope Editor: an interactive parallel programming tool
PPOPP '93 Proceedings of the fourth ACM SIGPLAN symposium on Principles and practice of parallel programming
Loop nest scheduling and transformations
Environments and tools for parallel scientific computing
Generating schedules and code within a unified reordering transformation framework
Generating schedules and code within a unified reordering transformation framework
Minimization of memory traffic in high-level synthesis
DAC '94 Proceedings of the 31st annual Design Automation Conference
Unifying data and control transformations for distributed shared-memory machines
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Improving data locality with loop transformations
ACM Transactions on Programming Languages and Systems (TOPLAS)
Instruction fetch mechanisms for VLIW architectures with compressed encodings
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Characterizing the Memory Behavior of Compiler-Parallelized Applications
IEEE Transactions on Parallel and Distributed Systems
Low-power mapping of behavioral arrays to multiple memories
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
A study on the number of memory ports in multiple instruction issue machines
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
Analytical energy dissipation models for low-power caches
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Low power motion estimation design using adaptive pixel truncation
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Instruction buffering to reduce power in processors for signal processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
A Software Approach to Avoiding Spatial Cache Collisions in Parallel Processor Systems
IEEE Transactions on Parallel and Distributed Systems
The system architect's workbench
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
A Compiler Optimization Algorithm for Shared-Memory Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Removal of memory access bottlenecks for scheduling control-flow intensive behavioral descriptions
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Period assignment in multidimensional periodic scheduling
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Augmenting Loop Tiling with Data Alignment for Improved Cache Performance
IEEE Transactions on Computers - Special issue on cache memory and related problems
Memory exploration for low power, embedded systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Global multimedia system design exploration using accurate memory organization feedback
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Selective instruction compression for memory energy reduction in embedded systems
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Program Improvement by Source-to-Source Transformation
Journal of the ACM (JACM)
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Filtering Memory References to Increase Energy Efficiency
IEEE Transactions on Computers
Synthesis of custom interleaved memory systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Journal of VLSI Signal Processing Systems - Special issue on system level design
System-level power optimization: techniques and tools
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Code compression for low power embedded system design
Proceedings of the 37th Annual Design Automation Conference
Memory aware compilation through accurate timing extraction
Proceedings of the 37th Annual Design Automation Conference
Memory bank customization and assignment in behavioral synthesis
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
A survey of design techniques for system-level dynamic power management
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low-power electronics and design
Memory arbitration and cache management in stream-based systems
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A power reduction technique with object code merging for application specific embedded processors
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Minimizing the required memory bandwidth in VLSI system realizations
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Algorithmic transforms for efficient energy scalable computation
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Energy minimization with guaranteed quality of service
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Compiler techniques for code compaction
ACM Transactions on Programming Languages and Systems (TOPLAS)
A preprocessing step for global loop transformations for data transfer optimization
CASES '00 Proceedings of the 2000 international conference on Compilers, architecture, and synthesis for embedded systems
Data cache sizing for embedded processor applications
Proceedings of the conference on Design, automation and test in Europe
Reducing memory requirements of nested loops for embedded systems
Proceedings of the 38th annual Design Automation Conference
Dynamic voltage scaling and power management for portable systems
Proceedings of the 38th annual Design Automation Conference
Energy priority scheduling for variable voltage processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Power-aware partitioned cache architectures
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Cached-code compression for energy minimization in embedded processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Mapping array communication onto FIFO communication - towards an implementation
ISSS '00 Proceedings of the 13th international symposium on System synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design
Reducing set-associative cache energy via way-prediction and selective direct-mapping
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Enhancing loop buffering of media and telecommunications applications using low-overhead predication
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
A framework for energy-scalable communication in high-density wireless networks
Proceedings of the 2002 international symposium on Low power electronics and design
Contents provider-assisted dynamic voltage scaling for low energy multimedia applications
Proceedings of the 2002 international symposium on Low power electronics and design
Low-power color TFT LCD display for hand-held embedded systems
Proceedings of the 2002 international symposium on Low power electronics and design
A history-based I-cache for low-energy multimedia applications
Proceedings of the 2002 international symposium on Low power electronics and design
Storage Management Programmable Process
Storage Management Programmable Process
Tuning of loop cache architectures to programs in embedded system design
Proceedings of the 15th international symposium on System Synthesis
Low Power Control Techniques For TFT LCD Displays
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
MIST: an algorithm for memory miss traffic management
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
An Iteration Partition Approach for Cache or Local Memory Thrashing on Parallel Processing
IEEE Transactions on Computers
On Uniformization of Affine Dependence Algorithms
IEEE Transactions on Computers
Dependence Uniformization: A Loop Parallelization Technique
IEEE Transactions on Parallel and Distributed Systems
Partitioned instruction cache architecture for energy efficiency
ACM Transactions on Embedded Computing Systems (TECS)
A Singular Loop Transformation Framework Based on Non-Singular Matrices
Proceedings of the 5th International Workshop on Languages and Compilers for Parallel Computing
A Unified Transformation Technique for Multilevel Blocking
Euro-Par '96 Proceedings of the Second International Euro-Par Conference on Parallel Processing - Volume I
Parallelizing Conditional Recurrences
Euro-Par '96 Proceedings of the Second International Euro-Par Conference on Parallel Processing - Volume I
Set Associative Cache Behavior Optimization
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
A CPU Scheduling Algorithm for Continuous Media Applications
NOSSDAV '95 Proceedings of the 5th International Workshop on Network and Operating System Support for Digital Audio and Video
A Holistic Approach to System Level Energy Optimization
PATMOS '00 Proceedings of the 10th International Workshop on Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation
A Low Energy Clustered Instruction Memory Hierarchy for Long Instruction Word Processors
PATMOS '02 Proceedings of the 12th International Workshop on Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
Multi-dimensional interleaving for time-and-memory design optimization
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
Synthesis of customized loop caches for core-based embedded systems
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Automatic data mapping of signal processing applications
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Predictable Instruction Caching for Media Processors
ASAP '02 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
Predictive sequential associative cache
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
Extensions to Programmable DSP architectures for Reduced Power Dissipation
VLSID '98 Proceedings of the Eleventh International Conference on VLSI Design: VLSI for Signal Processing
Power-aware Multimedia Systems using Run-time Prediction
VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
Power/Performance Advantages of Victim Buffer in High-Performance Processors
VOLTA '99 Proceedings of the IEEE Alessandro Volta Memorial Workshop on Low-Power Design
Instruction Scheduling Based on Energy and Performance Constraints
WVLSI '00 Proceedings of the IEEE Computer Society Annual Workshop on VLSI (WVLSI'00)
Dynamic Loop Caching Meets Preloaded Loop Caching " A Hybrid Approach
ICCD '02 Proceedings of the 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD'02)
Efficient Integration of Compiler-Directed Cache Coherence and Data Prefetching
IPDPS '00 Proceedings of the 14th International Symposium on Parallel and Distributed Processing
IPDPS '00 Proceedings of the 14th International Symposium on Parallel and Distributed Processing
The Memory Bandwidth Bottleneck and its Amelioration by a Compiler
IPDPS '00 Proceedings of the 14th International Symposium on Parallel and Distributed Processing
Flow Graph Balancing for Minimizing the Required Memory Bandwidth
ISSS '96 Proceedings of the 9th international symposium on System synthesis
Loop Alignment for Memory Accesses Optimization
Proceedings of the 12th international symposium on System synthesis
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications
Proceedings of the 12th international symposium on System synthesis
Compressed Code Execution on DSP Architectures
Proceedings of the 12th international symposium on System synthesis
Reducing Power with an LO Instruction Cache Using History-Based Prediction
IWIA '02 Proceedings of the International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA'02)
An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs
Proceedings of the conference on Design, automation and test in Europe
Assigning Program and Data Objects to Scratchpad for Energy Reduction
Proceedings of the conference on Design, automation and test in Europe
An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW Cores
Proceedings of the conference on Design, automation and test in Europe
Power Savings in Embedded Processors through Decode Filer Cache
Proceedings of the conference on Design, automation and test in Europe
Design of a Predictive Filter Cache for Energy Savings in High Performance Processor Architectures
ICCD '01 Proceedings of the International Conference on Computer Design: VLSI in Computers & Processors
R-EDF: A Reservation-Based EDF Scheduling Algorithm for Multiple Multimedia Task Classes
RTAS '01 Proceedings of the Seventh Real-Time Technology and Applications Symposium (RTAS '01)
Memory optimizations and exploration for embedded systems
Memory optimizations and exploration for embedded systems
Survey of code-size reduction methods
ACM Computing Surveys (CSUR)
Instruction buffering exploration for low energy VLIWs with instruction clusters
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example
IEEE Computer Architecture Letters
Full Parallelism in Uniform Nested Loops Using Multi-Dimensional Retiming
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 02
On the Performance Enhancement of Paging Systems Through Program Analysis and Transformations
IEEE Transactions on Computers
A study of replacement algorithms for a virtual-storage computer
IBM Systems Journal
Local memory exploration and optimization in embedded systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Software-controlled processor speed setting for low-power streaming multimedia
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Dynamic frequency scaling with buffer insertion for mixed workloads
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Resource usage in embedded system platforms depends on application workload characteristics, desired quality of service and environmental conditions. In general, system workload is highly non-stationary due to the heterogeneous nature of information content. Quality of service depends on user requirements, which may change over time. In addition, both can be affected by environmental conditions such as network congestion and wireless link quality.