Discrete-time signal processing
Discrete-time signal processing
Journal of VLSI Signal Processing Systems - Special issue on the rapid prototyping of application specific signal processors (RASSP) program
C++ primer (3rd ed.)
Power scalable processing using distributed arithmetic
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Area-Delay Tradeoff in Distributed Arithmetic Based Implementation of FIR Filters
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
VLSID '00 Proceedings of the 13th International Conference on VLSI Design
Low-power data-dependent transform video and still image coding
Low-power data-dependent transform video and still image coding
Blind beamforming on a randomly distributed sensor array system
IEEE Journal on Selected Areas in Communications
From myth to methodology: cross-layer design for energy-efficient wireless communication
Proceedings of the 42nd annual Design Automation Conference
Energy-scalable OFDM transmitter design and control
Proceedings of the 43rd annual Design Automation Conference
Cross-layer power management in wireless networks and consequences on system-level architecture
Signal Processing - Special section: Advances in signal processing-assisted cross-layer designs
ESL design and HW/SW co-verification of high-end software defined radio platforms
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Energy-efficient bandwidth allocation for multiuser scalable video streaming over WLAN
EURASIP Journal on Wireless Communications and Networking - Multimedia over Wireless Networks
A Low Complexity Reconfigurable DCT Architecture to Trade off Image Quality for Power Consumption
Journal of Signal Processing Systems
Energy Aware Algorithm and Implementation of SDR Oriented HSDPA Chip Level Equalizer
Journal of Signal Processing Systems
Want to save energy?: put intelligence into systems
CSECS'09 Proceedings of the 8th WSEAS International Conference on Circuits, systems, electronics, control & signal processing
A system level algorithmic approach toward energy-aware SDR baseband implementations
ICC'09 Proceedings of the 2009 IEEE international conference on Communications
HERQULES: system level cross-layer design exploration for efficient energy-quality trade-offs
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Dynamic bit-width adaptation in DCT: an approach to trade off image quality and computation energy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Integrated solar energy harvesting and storage
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy Aware Signal Processing for Software Defined Radio Baseband Implementation
Journal of Signal Processing Systems
Embedded Systems Design
| Hi-index | 0.00 |
We introduce the notion of energy-scalable system design. The principal idea is to maximize computational quality for a given energy constraint at all levels of the system hierarchy. The desirable energy-quality (E-Q) characteristics of systems are discussed. E-Q behavior of algorithms is considered and transforms that significantly improve scalability are analyzed using three distinct categories of commonly used signal-processing algorithms on the StrongARM SA-1100 processor as examples (viz., filtering, frequency domain transforms and classification). Scalability hooks in hardware are analyzed using similar examples on the Pentium III processor and a scalable programming methodology is proposed. Design techniques for true energy scalable hardware are also demonstrated using filtering as an example.