Dynamic bit-width adaptation in DCT: an approach to trade off image quality and computation energy

  • Authors:
  • Jongsun Park;Jung Hwan Choi;Kaushik Roy

  • Affiliations:
  • School of Electrical Engineering, Korea University, Seoul, Korea;Digital Media and Communications R&D Center, Samsung Electronics, Suwon, Gyeounggi, Korea;School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2010

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Abstract

This paper presents a dynamic bit-width adaptation scheme for applications using discrete cosine transform (DCT). The technique can efficiently trade off image quality and computation energy. Based on sensitivity differences of 64 DCT coefficients, separate operand bit-widths are used for different frequency components to reduce computation energy. To select the appropriate operand bit-widths that achieve significant reduction of power consumption with minimum image quality degradation, we also propose a bit-width selection algorithm. The proposed variable bit precision DCT algorithm can be efficiently implemented using carry save adder trees. The reconfigurable DCT architecture can achieve power savings ranging from 36% to 75% compared to normal operation at the expense of minor image quality degradation.