IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
EURASIP Journal on Wireless Communications and Networking
EURASIP Journal on Applied Signal Processing
The MDL criterion for rank determination via effective singularvalues
IEEE Transactions on Signal Processing
A Unified Approach to Dynamic Length Algorithms for Adaptive Linear Equalizers
IEEE Transactions on Signal Processing
MMSE equalization of downlink CDMA channel utilizing unused orthogonal spreading sequences
IEEE Transactions on Signal Processing
An LMS style variable tap-length algorithm for structure adaptation
IEEE Transactions on Signal Processing
MEERA: cross-layer methodology for energy efficient resource allocation in wireless networks
IEEE Transactions on Wireless Communications
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The flexibility and programmability of SDR come at the expense of reduced efficiency and increased energy consumption. This is usually considered as the penalty of SDR. However, the flexibility and programmability have great potentials for improving the system-wide efficiency if they are properly exploited. In this paper, we present a HSDPA chip equalizer that is explicitly designed for SDR implementations. The first SDR-specific feature of our work is the multi-mode operation based on heterogeneous algorithms. The proposed equalizer combines an optimized LMS variant (with subspace-aware extension) and an optimized SRI-RLS algorithm based on QRD. Instead of always applying the powerful SRI-RLS algorithm, the equalizer switches to simple LMS-variant when possible. With negligible BER degradation, the multi-mode operation can reduce 60% of the cycle-count on TI TMS320C6713 for 3GPP case 4 with 16QAM modulation. The proposed equalizer framework also incorporates a generic, robust and efficient scheme for equalization-length adaptation. The length-adaptation scheme can make very fast run-time decision based on an efficient policy-template, which is optimized with large training set at design time. We test 14 representative channel profiles specified in ITU-R M.1225, 3GPP TR 25.943 and 3GPP TS 25.101. Comparing to worst-case based design the length-adaptation achieves more than 10脳 cycle-count reductions for ten of the cases.