Specification and design of embedded systems
Specification and design of embedded systems
Definition and solution of the memory packing problem for field-programmable systems
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Background memory area estimation for multidimensional signal processing systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Memory bank and register allocation in software synthesis for ASIPs
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Exploiting dual data-memory banks in digital signal processors
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Fast and extensive system-level memory exploration for ATM applications
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Memory-CPU size optimization for embedded system designs
DAC '97 Proceedings of the 34th annual Design Automation Conference
Application-driven synthesis of core-based systems
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
EDTC '97 Proceedings of the 1997 European conference on Design and Test
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Data and memory optimization techniques for embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An integrated algorithm for memory allocation and assignment in high-level synthesis
Proceedings of the 39th annual Design Automation Conference
Data Memory Organization and Optimizations in Application-Specific Systems
IEEE Design & Test
Memory Architectures for Embedded Systems-On-Chip
HiPC '02 Proceedings of the 9th International Conference on High Performance Computing
Exploiting bank locality in multi-bank memories
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Memory allocation and mapping in high-level synthesis: an integrated approach
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Fast memory bank assignment for fixed-point digital signal processors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Impact of Data Transformations on Memory Bank Locality
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 1
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Nonuniform Banking for Reducing Memory Energy Consumption
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Integer linear programming based energy optimization for banked DRAMs
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Proceedings of the 42nd annual Design Automation Conference
Data Replication in Banked DRAMs for Reducing Energy Consumption
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Minimizing energy consumption of banked memories using data recomputation
Proceedings of the 2006 international symposium on Low power electronics and design
ILP-Based energy minimization techniques for banked memories
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Memory Allocation for Multi-Resolution Image Processing
IEICE - Transactions on Information and Systems
Optimal periodic memory allocation for image processing with multiple windows
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Reducing memory space consumption through dataflow analysis
Computer Languages, Systems and Structures
Embedded Systems Design
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With increasing design complexity and chip area, on-chip memory has become an important component whose integration needs to be addressed during system design. Modern embedded DRAM technology allows for large amounts of on-chip memory space. However, in order to utilize the available memory intelligently, the memory has to be appropriately customized for the specific application. We address the topic of incorporating the application-specific customization of memory bank configuration into behavioral synthesis. The strategy involves a partitioning of behavioral arrays into memory banks based on a cost function that estimates the performance implications. For a given candidate partition, we present a heuristic for determining the access sequence that minimizes page misses in a bank while respecting data dependences. The output of the exploration is a graph displaying the variation of delay and memory area with the bank configuration. Our experiments on several memory-intensive examples confirm that the exploration results can provide critical feedback to the designer about the optimal memory configuration for a given application.