A data locality optimizing algorithm
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
Computer organization & design: the hardware/software interface
Computer organization & design: the hardware/software interface
Power analysis of embedded software: a first step towards software power minimization
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Design of heterogeneous ICs for mobile and personal communication systems
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Minimization of memory traffic in high-level synthesis
DAC '94 Proceedings of the 31st annual Design Automation Conference
Background memory area estimation for multidimensional signal processing systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A 1-V 1-Mb SRAM for portable equipment
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Power exploration for data dominated video applications
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Allocation of multiport memories for hierarchical data stream
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Fast and extensive system-level memory exploration for ATM applications
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Formalized methodology for data reuse exploration in hierarchical memory mappings
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
System-level power estimation and optimization—challenges and perspectives
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Parallel Computing - Special issue on applications: parallel processing and multimedia
Reducing power in high-performance microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
System-Level Power Optimization of Video Codecs on Embedded Cores: A Systematic Approach
Journal of VLSI Signal Processing Systems - Special issue on future directions in the design and implementations of DSP systems
High-level address optimization and synthesis techniques for data-transfer-intensive applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Embedded DRAM architectural trade-offs
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe
Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design
Memory organization for video algorithms on programmable signal processors
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
System-Level Memory Management for Weakly Parallel Image Processing
Euro-Par '96 Proceedings of the Second International Euro-Par Conference on Parallel Processing-Volume II
System level memory optimization for hardware-software co-design
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Memory Organization for Improved Data Cache Performance in Embedded Processors
ISSS '96 Proceedings of the 9th international symposium on System synthesis
Flow Graph Balancing for Minimizing the Required Memory Bandwidth
ISSS '96 Proceedings of the 9th international symposium on System synthesis
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Dynamic techniques to reduce memory traffic in embedded systems
Proceedings of the 1st conference on Computing frontiers
Embedded Systems Design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A scalable and near-optimal representation of access schemes for memory management
ACM Transactions on Architecture and Code Optimization (TACO)
| Hi-index | 0.00 |
Recent experiments for the realisation of data-dominatedmulti-media applications have clearly demonstrated that the mainpower (and largely also area) cost is situated in the memory unitsand the (bus) communication hardware. On the custom hardware side,several system level memory management related methodologies arebeing proposed which promise very large savings on power and also onarea while still meeting the real-time constraints. Unfortunately,on the software side these methodologies are not applicable as such.In order to alleviate this situation for systems-on-a-chip with aheterogeneous mix of processors, novel methodology and architectureapproaches are required. In this research summary paper, thecurrently available solutions will be reviewed and some majorproblems to be solved in the future are identified.