Education for the deep submicron age: business as usual?
DAC '97 Proceedings of the 34th annual Design Automation Conference
New DRAM Technologies: A Comprehensive Analysis of the New Architecture
New DRAM Technologies: A Comprehensive Analysis of the New Architecture
Issues in embedded DRAM development and applications
Proceedings of the 11th international symposium on System synthesis
Low-Power Parallel Video Compression Architecture for a Single-Chip Digital CMOS Camera
Journal of VLSI Signal Processing Systems - Special issue on system level design
Journal of VLSI Signal Processing Systems - Special issue on system level design
Random-Access Data Storage Components in Customized Architectures
IEEE Design & Test
Efficient Online and Offline Testing of Embedded DRAMs
IEEE Transactions on Computers
A Modular Embedded DRAM Core Concept in 0.24 Micron Technology
MTDT '98 Proceedings of the 1998 IEEE International Workshop on Memory Technology, Design and Testing
Error Detecting Refreshment for Embedded DRAMs
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
An Adder Using Charge Sharing and its Application in DRAMs
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
2.5-Dimensional VLSI system integration
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Versatile refresh: low complexity refresh scheduling for high-throughput multi-banked eDRAM
Proceedings of the 12th ACM SIGMETRICS/PERFORMANCE joint international conference on Measurement and Modeling of Computer Systems
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In this paper we discuss system-related aspects in embedded DRAM/logic designs. We focus on large embedded memories which have to be implemented as DRAMs.