Power analysis of embedded software: a first step towards software power minimization
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Minimization of memory traffic in high-level synthesis
DAC '94 Proceedings of the 31st annual Design Automation Conference
A 1-V 1-Mb SRAM for portable equipment
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Power exploration for data dominated video applications
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Allocation of multiport memories for hierarchical data stream
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Fast and extensive system-level memory exploration for ATM applications
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Formalized methodology for data reuse exploration in hierarchical memory mappings
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
System-level power estimation and optimization—challenges and perspectives
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
System-Level Power Optimization of Video Codecs on Embedded Cores: A Systematic Approach
Journal of VLSI Signal Processing Systems - Special issue on future directions in the design and implementations of DSP systems
Memory organization for video algorithms on programmable signal processors
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
System level memory optimization for hardware-software co-design
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Memory Organization for Improved Data Cache Performance in Embedded Processors
ISSS '96 Proceedings of the 9th international symposium on System synthesis
Architecture and applications of the HiPAR video signal processor
IEEE Transactions on Circuits and Systems for Video Technology
Issues in embedded DRAM development and applications
Proceedings of the 11th international symposium on System synthesis
Journal of VLSI Signal Processing Systems - Special issue on system level design
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Both in custom and programmable instruction-set processors for data-dominated multi-media applications, many of the architecture components are intended to solve the data transfer and storage issues. Recent experiments at several locations have clearly demonstrated that due to this fact, the main power (and largely also area) cost is situated in the memory units and the communication hardware. In this paper, the main reasons for this problem will be reviewed and a perspective will be provided on the expected near-future evolution. It will be shown that the circuit and process technology advances have been very significant in the past decade. Still, these are not sufficient to fully solve this power and area bottle-neck which has been created in the same period. Therefore, also several possible design methodology remedies will be proposed for this critical design issue, with emphasis on effective system-level memory management methodologies. These promise very large savings on energy-delay also on area for multi-media applications, while still meeting the real-time constraints.