Accuracy-aware SRAM: a reconfigurable low power SRAM architecture for mobile multimedia applications

Authors:
Minki Cho;Jason Schlessman;Wayne Wolf;Saibal Mukhopadhyay
Affiliations:
Georgia Institute of Technology, GA;Princeton University, NJ;Georgia Institute of Technology, GA;Georgia Institute of Technology, GA
Venue:
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Year:
2009

Citing 11
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Abstract

We propose a dynamically reconfigurable SRAM architecture for low-power mobile multimedia applications. Parametric failures due to manufacturing variations limit the opportunities for power saving in SRAM. We show that, using a lower voltage for cells storing low-order bits and a nominal voltage for cells storing higher order bits, ~45% savings in memory power can be achieved with a marginal (~10%) reduction in image quality. A reconfigurable array structure is developed to dynamically reconfigure the number of bits in different voltage domains.