Energy-efficient signal processing via algorithmic noise-tolerance
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Computer Architecture: A Quantitative Approach
Computer Architecture: A Quantitative Approach
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Energy Aware Computing through Probabilistic Switching: A Study of Limits
IEEE Transactions on Computers
Computation: finite and infinite machines
Computation: finite and infinite machines
Probabilistic arithmetic and energy efficient embedded signal processing
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Probabilistic system-on-a-chip architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Process variation tolerant low power DCT architecture
Proceedings of the conference on Design, automation and test in Europe
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Accuracy-aware SRAM: a reconfigurable low power SRAM architecture for mobile multimedia applications
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Experimental analysis of sequence dependence on energy saving for error tolerant image processing
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
Proceedings of the 46th Annual Design Automation Conference
Irreversibility and heat generation in the computing process
IBM Journal of Research and Development
Scalable effort hardware design: exploiting algorithmic resilience for energy efficiency
Proceedings of the 47th Design Automation Conference
HERQULES: system level cross-layer design exploration for efficient energy-quality trade-offs
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Scalable stochastic processors
Proceedings of the Conference on Design, Automation and Test in Europe
ERSA: error resilient system architecture for probabilistic applications
Proceedings of the Conference on Design, Automation and Test in Europe
Optimizing energy to minimize errors in dataflow graphs using approximate adders
CASES '10 Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems
Low-power multimedia system design by aggressive voltage scaling
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An approach to energy-error tradeoffs in approximate ripple carry adders
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Stochastic computing: embracing errors in architectureand design of processors and applications
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
Parsimonious circuits for error-tolerant applications through probabilistic logic minimization
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
ARCS'12 Proceedings of the 25th international conference on Architecture of Computing Systems
Proceedings of the 9th conference on Computing Frontiers
What to do about the end of Moore's law, probably!
Proceedings of the 49th Annual Design Automation Conference
Synthesizing Parsimonious Inexact Circuits through Probabilistic Design Techniques
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on Probabilistic Embedded Computing
Improving energy gains of inexact DSP hardware through reciprocative error compensation
Proceedings of the 50th Annual Design Automation Conference
| Hi-index | 0.00 |
Well over a decade ago, many believed that an engine of growth driving the semiconductor and computing industries---captured nicely by Gordon Moore’s remarkable prophecy (Moore’s law)---was speeding towards a dangerous cliff-edge. Ranging from expressions of concern to doomsday scenarios, the exact time when serious hurdles would beset us varied quite a bit---some of the more optimistic warnings giving Moore’s law until. Needless to say, a lot of people have spent time and effort with great success to find ways for substantially extending the time when we would encounter the dreaded cliff-edge, if not avoiding it altogether. Faced with this issue, we started approaching this in a decidedly different manner---one which suggested falling off the metaphorical cliff as a design choice, but in a controlled way. This resulted in devices that could switch and produce bits that are correct, namely of having the intended value, only with a probabilistic guarantee. As a result, the results could in fact be incorrect. Such devices and associated circuits and computing structures are now broadly referred to as inexact designs, circuits, and architectures. In this article, we will crystallize the essence of inexactness dating back to 2002 through two key principles that we developed: (i) that of admitting error in a design in return for resource savings, and subsequently (ii) making resource investments in the elements of a hardware platform proportional to the value of information they compute. We will also give a broad overview of a range of inexact designs and hardware concepts that our group and other groups around the world have been developing since, based on these two principles. Despite not being deterministically precise, inexact designs can be significantly more efficient in the energy they consume, their speed of execution, and their area needs, which makes them attractive in application contexts that are resilient to error. Significantly, our development of inexactness will be contrasted against the rich backdrop of traditional approaches aimed at realizing reliable computing from unreliable elements, starting with von Neumann’s influential lectures and further developed by Shannon-Weaver and others.