Optimizing energy to minimize errors in dataflow graphs using approximate adders

Authors:
Zvi Kedem;Vincent J. Mooney;Kirthi Krishna Muntimadugu;Krishna V. Palem;Avani Devarasetty;Phani Deepak Parasuramuni
Affiliations:
New York University, New York, NY, USA;Georgia Institute of Technology, Atlanta, Georgia, USA & Nanyang Technological University, Singapore, Singapore;Rice University, Houston, TX, USA;Rice University, Houston, TX, USA;International Institute of Information Technology, Hyderabad, Hyderabad, India;International Institute of Information Technology, Hyderabad, Hyderabad, India
Venue:
CASES '10 Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems
Year:
2010

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Abstract

Approximate arithmetic is a promising, new approach to low-energy designs while tackling reliability issues. We present a method to optimally distribute a given energy budget among adders in a dataflow graph so as to minimize expected errors. The method is based on new formal mathematical models and algorithms, which quantitatively characterize the relative importance of the adders in a circuit. We demonstrate this method on a finite impulse response filter and a Fast Fourier Transform. The optimized energy distribution yields 2.05X lower error in a 16-point FFT and images with SNR 1.42X higher than those achieved by the best previous approach.