Energy minimization using multiple supply voltages
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
The simulation and evaluation of dynamic voltage scaling algorithms
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Soft digital signal processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Analysis of Carry Propagation in Addition: An Elementary Approach
Analysis of Carry Propagation in Addition: An Elementary Approach
Variable voltage task scheduling algorithms for minimizing energy/power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Reliable low-power digital signal processing via reduced precision redundancy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Probabilistic arithmetic and energy efficient embedded signal processing
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Low-power filtering via adaptive error-cancellation
IEEE Transactions on Signal Processing
Converter-free multiple-voltage scaling techniques for low-power CMOS digital design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Experimental analysis of sequence dependence on energy saving for error tolerant image processing
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
Energy-aware probabilistic multiplier: design and analysis
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
A general mathematical model of probabilistic ripple-carry adders
Proceedings of the Conference on Design, Automation and Test in Europe
Optimizing energy to minimize errors in dataflow graphs using approximate adders
CASES '10 Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems
Dynamic knobs for responsive power-aware computing
Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems
An approach to energy-error tradeoffs in approximate ripple carry adders
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
IMPACT: imprecise adders for low-power approximate computing
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Managing performance vs. accuracy trade-offs with loop perforation
Proceedings of the 19th ACM SIGSOFT symposium and the 13th European conference on Foundations of software engineering
Parsimonious circuits for error-tolerant applications through probabilistic logic minimization
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
Randomized accuracy-aware program transformations for efficient approximate computations
POPL '12 Proceedings of the 39th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
ARCS'12 Proceedings of the 25th international conference on Architecture of Computing Systems
Proceedings of the 9th conference on Computing Frontiers
Incorrect systems: it's not the problem, it's the solution
Proceedings of the 49th Annual Design Automation Conference
What to do about the end of Moore's law, probably!
Proceedings of the 49th Annual Design Automation Conference
Ten Years of Building Broken Chips: The Physics and Engineering of Inexact Computing
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on Probabilistic Embedded Computing
Synthesizing Parsimonious Inexact Circuits through Probabilistic Design Techniques
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on Probabilistic Embedded Computing
Improving energy gains of inexact DSP hardware through reciprocative error compensation
Proceedings of the 50th Annual Design Automation Conference
High performance reliable variable latency carry select addition
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Models for characterizing noise based PCMOS circuits
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on ESTIMedia'10
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We develop a theoretical foundation to characterize a novel methodology for low energy and high performance dsp for embedded computing. Computing elements are operated at a frequency higher than that permitted by a conventionally correct circuit design, enabling a trade-off between error that is deliberately introduced, and the energy consumed. Similar techniques considered previously were relevant to deeply scaled future technology generations. Our work extends this idea to be applicable to current-day designs through: (i) a mathematically rigorous foundation characterizing a tradeoff between energy consumed and the quality of solution, and (ii) a means of achieving this trade off through very aggressive voltage scaling beyond that of a conventionally designed circuit. Through our "cmos inspired" mathematical model, we show that our approach is better (by an exponential factor) than the conventional uniform voltage scaling approach for comparable computational speed or performance. We further establish through experimental study that a similar improvement by a factor of 3.4x to the snr over conventional voltage-scaled approaches can be achieved in the context of the ubiquitous discrete Fourier transform.