The simulation and evaluation of dynamic voltage scaling algorithms

  • Authors:
  • Trevor Pering;Tom Burd;Robert Brodersen

  • Affiliations:
  • University of California Berkeley Electronics Research Laboratory, 211-109 Cory #1770, Berkeley, CA;University of California Berkeley Electronics Research Laboratory, 211-109 Cory #1770, Berkeley, CA;University of California Berkeley Electronics Research Laboratory, 211-109 Cory #1770, Berkeley, CA

  • Venue:
  • ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
  • Year:
  • 1998

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Abstract

The reduction of energy consumption in microprocessors can be accomplished without impacting the peak performance through the use of dynamic voltage scaling (DVS). This approach varies the processor voltage under software control to meet dynamically varying performance requirements. This paper presents a foundation for the simulation and analysis of DVS algorithms. These algorithms are applied to a benchmark suite specifically targeted for PDA devices.