Some Results of the Earliest Deadline Scheduling Algorithm
IEEE Transactions on Software Engineering
Comparing algorithm for dynamic speed-setting of a low-power CPU
MobiCom '95 Proceedings of the 1st annual international conference on Mobile computing and networking
The simulation and evaluation of dynamic voltage scaling algorithms
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Real-time dynamic voltage scaling for low-power embedded operating systems
SOSP '01 Proceedings of the eighteenth ACM symposium on Operating systems principles
SODA '03 Proceedings of the fourteenth annual ACM-SIAM symposium on Discrete algorithms
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
A Fast Resource Synthesis Technique for Energy-Efficient Real-Time Systems
RTSS '02 Proceedings of the 23rd IEEE Real-Time Systems Symposium
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Power-Aware Scheduling for Periodic Real-Time Tasks
IEEE Transactions on Computers
Leakage aware dynamic voltage scaling for real-time embedded systems
Proceedings of the 41st annual Design Automation Conference
Feedback EDF Scheduling Exploiting Dynamic Voltage Scaling
RTAS '04 Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium
The design and application of the PowerPC 405LP energy-efficient system-on-a-chip
IBM Journal of Research and Development
Using resource reservation techniques for power-aware scheduling
Proceedings of the 4th ACM international conference on Embedded software
Compiler Support for Reducing Leakage Energy Consumption
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Fixed Priority Scheduling for Reducing Overall Energy on Variable Voltage Processors
RTSS '04 Proceedings of the 25th IEEE International Real-Time Systems Symposium
Dynamic slack reclamation with procrastination scheduling in real-time embedded systems
Proceedings of the 42nd annual Design Automation Conference
Feedback EDF scheduling exploiting hardware-assisted asynchronous dynamic voltage scaling
LCTES '05 Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Procrastination for leakage-aware rate-monotonic scheduling on a dynamic voltage scaling processor
Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems
System-Level Energy Management for Periodic Real-Time Tasks
RTSS '06 Proceedings of the 27th IEEE International Real-Time Systems Symposium
Policies for dynamic clock scheduling
OSDI'00 Proceedings of the 4th conference on Symposium on Operating System Design & Implementation - Volume 4
Scheduling for reduced CPU energy
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
Feedback scheduling: an event-driven paradigm
ACM SIGPLAN Notices
Optimality and improvement of dynamic voltage scaling algorithms for multimedia applications
Proceedings of the 45th annual Design Automation Conference
Optimality and improvement of dynamic voltage scaling algorithms for multimedia applications
IEEE Transactions on Circuits and Systems Part I: Regular Papers
On the energy consumption and performance of systems software
Proceedings of the 4th Annual International Conference on Systems and Storage
Making DRAM refresh predictable
Real-Time Systems
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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Recent trends in CMOS fabrication have the demand to conserve power of processors. While dynamic voltage scaling (DVS) is effective in reducing dynamic power, microprocessors produced in ever smaller fabrication processes are increasingly dominated bystatic power. For such processors, voltage/frequency pairs below acritical speed result in higher energy per cycle than entering a processor sleep mode. Yet, computational demand above this critical speed is best met by DVS techniques while still conserving power. We develop a novel combined leakage and DVS scheduling algorithm forreal-time systems, DVS leak, based on earliest-deadline-first scheduling (EDF). Our method trades off DVS with leakage, where the former slows down execution while the latter intelligently defers dispatching of jobs when sleeping is beneficial. We further capitalize on feedback knowledge about actual execution times to anticipate computational demands without sacrificing deadline guarantees. As such, we contribute a novel feedback delay policy for leakage awareness, which addresses structural limitations of prior approaches. Experiments show that this combined DVS/leakage algorithm results in an average of (a) 50% additional energy savings over a leakage-oblivious DVS algorithm, (b) 20% more energy savings over a more simplistic combination of DVS and sleep policies and (c) 8.5% or more over dynamic slack reclamation with procrastination. Particularly task sets with periods shorter than ten milliseconds profit from our approach with 15% energy savings over best prior schemes. This makes DVS leak the best combined DVS/leakage regulation approach for real-time systems that we know of.