DIP: a double-interval-based dynamic voltage scaling scheme for dynamic priority-based task scheduling systems

  • Authors:
  • Sookyoung Kim;Thomas L. Martin

  • Affiliations:
  • Virginia Polytechnic Institute and State University, Blacksburg, VA;Virginia Polytechnic Institute and State University, Blacksburg, VA

  • Venue:
  • GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
  • Year:
  • 2005

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Abstract

The goal of dynamic voltage scaling (DVS) is to reduce CPU energy consumption without degrading applications' quality-of-service (QoS). In general-purpose systems, in which a variety of tasks are scheduled by a traditional dynamic priority-based task scheduler, existing DVS schemes tend to degrade the QoS by causing urgent tasks having low priorities to starve because these schemes ignore the behavior of dynamic priority-based task schedulers. In this paper, we propose the 'double-interval-based DVS scheme for priority-based task scheduling systems (DIP)', which better manages time-sensitive tasks' QoS by bridging the gap between CPU speed scheduling and dynamic priority-based task scheduling. We describe how DIP determines an appropriate CPU speed for a group of coexisting tasks considering tasks' priorities, using an improved interval-based algorithm so that the CPU-time requirements of the low priority time-sensitive tasks in the group can be satisfied. Another novel feature of DIP is that it separates QoS-control from throughput-control via two different interval-based algorithms, which allows more energy savings when throughput is not a primary concern. Trace-based simulations show that, depending upon target systems' primary concern, DIP generally provides better energy savings at comparable QoS or better QoS at comparable energy savings, respectively, compared to existing DVS schemes.