Embedded power supply for low-power DSP
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Power optimization of variable voltage core-based systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
The simulation and evaluation of dynamic voltage scaling algorithms
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Segmented bus design for low-power systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Approximation Algorithms for the Discrete Time-Cost Tradeoff Problem
Mathematics of Operations Research
Power conscious fixed priority scheduling for hard real-time systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Approximation algorithms for the discrete time-cost tradeoff problem
SODA '97 Proceedings of the eighth annual ACM-SIAM symposium on Discrete algorithms
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Fast Approximation Algorithms for the Knapsack and Sum of Subset Problems
Journal of the ACM (JACM)
Run-time voltage hopping for low-power real-time systems
Proceedings of the 37th Annual Design Automation Conference
Voltage scheduling in the IpARM microprocessor system
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Low-energy intra-task voltage scheduling using static timing analysis
Proceedings of the 38th annual Design Automation Conference
Energy efficient fixed-priority scheduling for real-time systems on variable voltage processors
Proceedings of the 38th annual Design Automation Conference
Energy priority scheduling for variable voltage processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
A profile-based energy-efficient intra-task voltage scheduling algorithm for real-time applications
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Variable voltage task scheduling algorithms for minimizing energy
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Power Aware Design Methodologies
Power Aware Design Methodologies
Power optimization of real-time embedded systems on variable speed processors
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Design theory and implementation for low-power segmented bus systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
SODA '03 Proceedings of the fourteenth annual ACM-SIAM symposium on Discrete algorithms
A survey of techniques for energy efficient on-chip communication
Proceedings of the 40th annual Design Automation Conference
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Proceedings of the conference on Design, automation and test in Europe
Variable voltage task scheduling algorithms for minimizing energy/power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Profit-driven uniprocessor scheduling with energy and timing constraints
Proceedings of the 2004 ACM symposium on Applied computing
Scheduling for reduced CPU energy
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
Energy-conscious, deterministic I/O device scheduling in hard real-time systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Single machine scheduling with discretely controllable processing times
Operations Research Letters
Hardness of approximation of the discrete time-cost tradeoff problem
Operations Research Letters
Procrastination for leakage-aware rate-monotonic scheduling on a dynamic voltage scaling processor
Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems
Power-aware scheduling for makespan and flow
Proceedings of the eighteenth annual ACM symposium on Parallelism in algorithms and architectures
Speed scaling on parallel processors
Proceedings of the nineteenth annual ACM symposium on Parallel algorithms and architectures
Getting the best response for your erg
ACM Transactions on Algorithms (TALG)
Power-aware scheduling for makespan and flow
Journal of Scheduling
Energy-Efficient Considerations on a Variable-Bitrate PCI-Express Device
Journal of Signal Processing Systems
Energy-efficiency on a variable-bitrate device
EUC'07 Proceedings of the 2007 conference on Emerging direction in embedded and ubiquitous computing
Speed scaling of tasks with precedence constraints
WAOA'05 Proceedings of the Third international conference on Approximation and Online Algorithms
SWAT'12 Proceedings of the 13th Scandinavian conference on Algorithm Theory
Journal of Scheduling
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We study the problem of non-preemptive scheduling to minimize energy consumption for devices that allow dynamic voltage scaling. Specifically, consider a device that can process jobs in a non-preemptive manner. The input consists of (i) the set R of available speeds of the device, (ii) a set J of jobs, and (iii) a precedence constraint Π among J. Each job j in J, defined by its arrival time aj, deadline dj, and amount of computation cj, is supposed to be processed by the device at a speed in R. Under the assumption that a higher speed means higher energy consumption, the power-saving scheduling problem is to compute a feasible schedule with speed assignment for the jobs in J such that the required energy consumption is minimized. This paper focuses on the setting of weakly dynamic voltage scaling, i.e., speed change is not allowed in the middle of processing a job. To demonstrate that this restriction on many portable power-aware devices introduces hardness to the power-saving scheduling problem, we prove that the problem is NP-hard even if aj = aj ′ and dj = dj ′ hold for all j,j ′∈ Jand |R|=2. If |R|j,j ′ ∈ J, aj ≤ aj ′ implies dj ≤ dj ′. To the best of our knowledge, there is no previously known approximation algorithm for any special case of the NP-hard problem.