Voltage scheduling in the IpARM microprocessor system

  • Authors:
  • Trevor Pering;Thomas Burd;Robert Brodersen

  • Affiliations:
  • Berkeley Wireless Research Center, University of California, Berkeley, 2108 Allston Way, Berkeley, CA;Berkeley Wireless Research Center, University of California, Berkeley, 2108 Allston Way, Berkeley, CA;Berkeley Wireless Research Center, University of California, Berkeley, 2108 Allston Way, Berkeley, CA

  • Venue:
  • ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
  • Year:
  • 2000

Quantified Score

Hi-index 0.00

Visualization

Abstract

Microprocessors represent a significant portion of the energy con冒sumed in portable electronic devices. Dynamic Voltage Scaling (DVS) allows a device to reduce energy consumption by lowering its processor speed at run-time, allowing a corresponding reduction in processor voltage and energy. A voltage scheduler determines the appropriate operating voltage by analyzing application con冒straints and requirements. A complete software implementation, including both applications and the underlying operating system, shows that DVS is effective at reducing the energy consumed with冒out requiring extensive software modification.