Comparing algorithm for dynamic speed-setting of a low-power CPU
MobiCom '95 Proceedings of the 1st annual international conference on Mobile computing and networking
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A predictive system shutdown method for energy saving of event-driven computation
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Advanced compiler design and implementation
Advanced compiler design and implementation
On-line scheduling of hard real-time tasks on variable voltage processor
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Run-time voltage hopping for low-power real-time systems
Proceedings of the 37th Annual Design Automation Conference
Voltage scheduling in the IpARM microprocessor system
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
A low power unified cache architecture providing power and performance flexibility (poster session)
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Low-energy intra-task voltage scheduling using static timing analysis
Proceedings of the 38th annual Design Automation Conference
Energy efficient fixed-priority scheduling for real-time systems on variable voltage processors
Proceedings of the 38th annual Design Automation Conference
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Energy efficient CMOS microprocessor design
HICSS '95 Proceedings of the 28th Hawaii International Conference on System Sciences
Scheduling for reduced CPU energy
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
Using offline bitstream analysis for power-aware video decoding in portable devices
Proceedings of the 13th annual ACM international conference on Multimedia
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
An optimal solution for the heterogeneous multiprocessor single-level voltage-setup problem
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Portable and battery operated devices pose a unique designchallenge in terms of performance requirements, low powerconstraints, and shrot design cycles.Embedded soft cores,on the other hand, provide functional flexibility and guaranteerapid design and thus are gaining popularity in designingsuch portable and battery operated devices.To addressthe low power needs, dynamic voltage scaled (DVS)processors provide a new tradeoff dimension to the designer.This work proposes an application-specific design space explorationframework for selecting energy-efficient operatingpoints in an embedded soft core.Specifically, we addressthe problem of selecting an appropriate number of operatingvoltage/frequency points and the distribution of these pointsalong the valid voltage span of a processor, given the applicationthat is to be executed on the processor.Furthermore,we provide a static intra-task scheduling techniquethat reduces energy consumption (4-20% in our experiments)even when the worst-case application execution time does notleave any slack for effective voltage scaling.We have experimentallyverified our techniques on a large set of embeddedbenchmarks selected from MiBench, PowerStone and MediaBench.