Comparing algorithm for dynamic speed-setting of a low-power CPU
MobiCom '95 Proceedings of the 1st annual international conference on Mobile computing and networking
High-level synthesis techniques for reducing the activity of functional units
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Scheduling and resource binding for low power
ISSS '95 Proceedings of the 8th international symposium on System synthesis
A power metric for mobile systems
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
The energy efficiency of IRAM architectures
Proceedings of the 24th annual international symposium on Computer architecture
The simulation and evaluation of dynamic voltage scaling algorithms
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Voltage scheduling in the IpARM microprocessor system
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Power reduction through work reuse
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Efficient instruction-level optimization methodology for low-power embedded systems
Proceedings of the 14th international symposium on Systems synthesis
Real-time dynamic voltage scaling for low-power embedded operating systems
SOSP '01 Proceedings of the eighteenth ACM symposium on Operating systems principles
Unified architecture level energy-efficiency metric
Proceedings of the 12th ACM Great Lakes symposium on VLSI
Critical power slope: understanding the runtime effects of frequency scaling
ICS '02 Proceedings of the 16th international conference on Supercomputing
Proceedings of the 2002 international symposium on Low power electronics and design
Power estimation of embedded systems: a hardware/software codesign approach
Readings in hardware/software co-design
A case for dynamic pipeline scaling
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Runtime Reconfiguration Techniques for Efficient General-Purpose Computation
IEEE Design & Test
Dynamic Voltage Scheduling for Real Time Asynchronous Systems
PATMOS '02 Proceedings of the 12th International Workshop on Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Energy Efficient Scheduling for Datapath Synthesis
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
A Power Perspective of Value Speculation for Superscalar Microprocessors
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
IEEE Transactions on Parallel and Distributed Systems
Exploring Efficient Operating Points for Voltage Scaled Embedded Processor Cores
RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
Optimization of scannable latches for low energy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Balancing hardware intensity in microprocessor pipelines
IBM Journal of Research and Development
The design and application of the PowerPC 405LP energy-efficient system-on-a-chip
IBM Journal of Research and Development
Power-Aware Scheduling for AND/OR Graphs in Real-Time Systems
IEEE Transactions on Parallel and Distributed Systems
The impact of grain size on the efficiency of embedded SIMD image processing architectures
Journal of Parallel and Distributed Computing
Dynamic Task-Level Voltage Scheduling Optimizations
IEEE Transactions on Computers
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
Energy-efficient datapath scheduling using multiple voltages and dynamic clocking
ACM Transactions on Design Automation of Electronic Systems (TODAES)
On the energy-efficiency of speculative hardware
Proceedings of the 2nd conference on Computing frontiers
Efficiency Analysis for a Mixed-Signal Focal Plane Processing Architecture
Journal of VLSI Signal Processing Systems
Mitigating Amdahl's Law through EPI Throttling
Proceedings of the 32nd annual international symposium on Computer Architecture
Energy management for commodity short-bit-width microcontrollers
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
The effects of energy management on reliability in real-time embedded systems
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
A dynamic-mode DVS algorithm under dynamic workloads
ACM SIGBED Review - Special issue: IEEE RTAS 2005 work-in-progress
An intra-task DVS algorithm exploiting path probabilities for real-time systems
ACM SIGBED Review - Special issue: IEEE RTAS 2005 work-in-progress
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Energy management for real-time embedded systems with reliability requirements
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Design and implementation of power-aware virtual memory
ATEC '03 Proceedings of the annual conference on USENIX Annual Technical Conference
Integrated CPU and l2 cache voltage scaling using machine learning
Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Register-Transfer Level Transformations for Low-Power Data-Paths
Integrated Computer-Aided Engineering
Certain investigations on energy saving techniques using DVS for low power embedded system
AIC'06 Proceedings of the 6th WSEAS International Conference on Applied Informatics and Communications
A Dynamic Voltage Scaling Algorithm for Dynamic Workloads
Journal of Signal Processing Systems
Feedback-controlled reliability-aware power management for real-time embedded systems
Proceedings of the 45th annual Design Automation Conference
DVSMT: Dynamic Voltage Scaling for Scheduling Mixed Real-Time Tasks
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
ICESS '07 Proceedings of the 3rd international conference on Embedded Software and Systems
A low-power parallel design of discrete wavelet transform using subthreshold voltage technology
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Meeting points: using thread criticality to adapt multicore hardware to parallel regions
Proceedings of the 17th international conference on Parallel architectures and compilation techniques
Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture
HiPEAC '09 Proceedings of the 4th International Conference on High Performance Embedded Architectures and Compilers
Leakage-Aware Multiprocessor Scheduling
Journal of Signal Processing Systems
Real-time static voltage scaling on multiprocessors
PDCS '07 Proceedings of the 19th IASTED International Conference on Parallel and Distributed Computing and Systems
Power-aware provisioning of Cloud resources for real-time services
Proceedings of the 7th International Workshop on Middleware for Grids, Clouds and e-Science
Enhanced reliability-aware power management through shared recovery technique
Proceedings of the 2009 International Conference on Computer-Aided Design
Modeling and analysis of power-aware systems
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
The impact of channel variations on wireless distributed computing networks
GLOBECOM'09 Proceedings of the 28th IEEE conference on Global telecommunications
A probabilistic and energy-efficient scheduling approach for online application in real-time systems
Proceedings of the 47th Design Automation Conference
Reliability aware power management for dual-processor real-time embedded systems
Proceedings of the 47th Design Automation Conference
ACM Transactions on Architecture and Code Optimization (TACO)
Power-aware temporal isolation with variable-bandwidth servers
EMSOFT '10 Proceedings of the tenth ACM international conference on Embedded software
Reliability-aware dynamic energy management in dependable embedded real-time systems
ACM Transactions on Embedded Computing Systems (TECS)
Assigning real-time tasks to heterogeneous processors by applying ant colony optimization
Journal of Parallel and Distributed Computing
Towards Adaptive Power-Aware Scheduling for Real-Time Tasks on DVS-Enabled Heterogeneous Clusters
GREENCOM-CPSCOM '10 Proceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications & Int'l Conference on Cyber, Physical and Social Computing
Environment-conscious scheduling of HPC applications on distributed Cloud-oriented data centers
Journal of Parallel and Distributed Computing
Generalized reliability-oriented energy management for real-time embedded applications
Proceedings of the 48th Design Automation Conference
Cooperative energy management in distributed wireless real-time systems
Wireless Networks
Tradeoff exploration between reliability, power consumption, and execution time
SAFECOMP'11 Proceedings of the 30th international conference on Computer safety, reliability, and security
PATMOS'09 Proceedings of the 19th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Dynamic voltage scaling for real-time scheduling of multimedia tasks
PCM'05 Proceedings of the 6th Pacific-Rim conference on Advances in Multimedia Information Processing - Volume Part II
Journal of Systems and Software
Energy efficient configuration for qos in reliable parallel servers
EDCC'05 Proceedings of the 5th European conference on Dependable Computing
Power consumption reduction using dynamic control of micro processor performance
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Hybrid super/subthreshold design of a low power scalable-throughput FFT architecture
Transactions on High-Performance Embedded Architectures and Compilers IV
Performance and power aware CMP thread allocation modeling
HiPEAC'10 Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers
Networks on chips: structure and design methodologies
Journal of Electrical and Computer Engineering - Special issue on Networks-on-Chip: Architectures, Design Methodologies, and Case Studies
Design exploration of energy-performance trade-offs for wireless sensor networks
Proceedings of the 49th Annual Design Automation Conference
An efficient energy and schedule length model for multiprocessor computers
International Journal of Computer Applications in Technology
An optimal energy and power model for dynamic voltage scaled multiprocessor systems
International Journal of Business Information Systems
An off-line dynamic voltage scaling scheme in multiprocessor real-time scheduling
Proceedings of the 2012 ACM Research in Applied Computation Symposium
Efficient task scheduling for hard real-time tasks in asymmetric multicore processors
ICA3PP'12 Proceedings of the 12th international conference on Algorithms and Architectures for Parallel Processing - Volume Part II
Journal of Computer and System Sciences
Predicting Performance Impact of DVFS for Realistic Memory Systems
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
MorphCore: An Energy-Efficient Microarchitecture for High Performance ILP and High Throughput TLP
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
Proceedings of the 2013 workshop on Energy efficient high performance parallel and distributed computing
Proceedings of the 50th Annual Design Automation Conference
International Journal of Business Information Systems
Journal of Systems and Software
Power-aware code scheduling assisted with power gating and DVS
Future Generation Computer Systems
Low-power scheduling with DVFS for common RTOS on multicore platforms
ACM SIGBED Review - Special Issue on the 3rd Embedded Operating System Workshop (EWiLi 2013)
DyPS: dynamic processor switching for energy-aware video decoding on multi-core SoCs
ACM SIGBED Review - Special Issue on the 3rd Embedded Operating System Workshop (EWiLi 2013)
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Reduction of power dissipation in microprocessor design is becoming a key design constraint. This is motivated not only by portable electronics, in which battery weight and size is critical, but by heat dissipation issues in larger desktop and parallel machines as well. By identifying the major modes of computation of these processors and by proposing figures of merit for each of these modes, a power analysis methodology is developed. It allows the energy efficiency of various architectures to be quantified, and provides techniques for either individually optimizing or trading off throughput and energy consumption. The methodology is then used to qualify three important design principles for energy-efficient microprocessor design.