System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors
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RTAS '00 Proceedings of the Sixth IEEE Real Time Technology and Applications Symposium (RTAS 2000)
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IEEE Transactions on Computers
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ICCS '07 Proceedings of the 7th international conference on Computational Science, Part IV: ICCS 2007
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
HiPC'07 Proceedings of the 14th international conference on High performance computing
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HiPC'08 Proceedings of the 15th international conference on High performance computing
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NPC'10 Proceedings of the 2010 IFIP international conference on Network and parallel computing
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UIC'06 Proceedings of the Third international conference on Ubiquitous Intelligence and Computing
ACM Transactions on Embedded Computing Systems (TECS)
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Journal of Parallel and Distributed Computing
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At present, saving energy consumption of modern processors and fault tolerance become major concerns due to the fact that high power consumption increases heat dissipation, which leads to decreased reliability of systems. Similarly, the faults of running tasks also reduce the reliability of systems. The algorithms proposed in this paper are based on the policy of shortest-task-first and combined with other efficient techniques, such as shared slack reclamation and checkpoint. Consequently, not only real-time tasks can be completed before deadline, but also reduction of the global power consumption and fault-tolerance will be satisfied dynamically. In this paper, we present four algorithms to cope with scheduling independent task sets and task sets with precedence relationship in homogeneous and heterogeneous systems, respectively. Moreover, we present dynamic fault-tolerant algorithm. Compared to the efficient algorithms presented so far, our algorithms show lower communicational complexity and much better scheduling performance in terms of makespan and energy consumption.