IEEE Transactions on Very Large Scale Integration (VLSI) Systems
COSYN: hardware-software co-synthesis of embedded systems
DAC '97 Proceedings of the 34th annual Design Automation Conference
A predictive system shutdown method for energy saving of event-driven computation
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Energy minimization using multiple supply voltages
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Power optimization of variable voltage core-based systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
LEneS: task scheduling for low-energy systems using variable supply voltage processors
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
RTSS '98 Proceedings of the IEEE Real-Time Systems Symposium
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
Power-Aware Bus Coscheduling for Periodic Realtime Applications Running on Multiprocessor SoC
Transactions on High-Performance Embedded Architectures and Compilers II
Leakage-aware dynamic scheduling for real-time adaptive applications on multiprocessor systems
Proceedings of the 47th Design Automation Conference
Efficient voltage scheduling and energy-aware co-synthesis for real-time embedded systems
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
Proceedings of the 50th Annual Design Automation Conference
A heuristic energy-aware approach for hard real-time systems on multi-core platforms
Microprocessors & Microsystems
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This paper focuses on system-level design methods for low energy consumption in architectures employing variable-voltage processors. Two lowenergy design flows are introduced. The first, Speed-up and Stretch, is based on the performance vs. low-energy design trade-off. The second, Eye-on-Energy, is based on energy sensitive scheduling and assignment techniques. Both of the approaches presented in this paper use simulated annealing to generate task-toprocessor assignments. Also, both use list-scheduling based methods for scheduling. The set of experiments presented here characterize the newly introduced approaches, while giving an idea about the cost vs. low-energy and performance vs. low-energy design trade-offs a designer has to make.