Performance and power aware CMP thread allocation modeling

  • Authors:
  • Yaniv Ben-Itzhak;Israel Cidon;Avinoam Kolodny

  • Affiliations:
  • Electrical Engineering Department, Technion, Haifa, Israel;Electrical Engineering Department, Technion, Haifa, Israel;Electrical Engineering Department, Technion, Haifa, Israel

  • Venue:
  • HiPEAC'10 Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers
  • Year:
  • 2010

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Abstract

We address the problem of performance and power-efficient thread allocation in a CMP. To that end, based on analytical model, we introduce a parameterized performance/power metric that can be adjusted according to a preferred tradeoff between performance and power. We introduce an iterative threshold algorithm (ITA) for allocating threads to cores in the case of a single application with symmetric threads. We extend this to a simple and efficient heuristic for the case of multiple applications. We compare the performance/power metric value of ITA with constrained nonlinear optimization, pattern search algorithm and genetic algorithm. ITA outperforms the best of these methods by 9 while consuming on average 0.01% and at most 2.5% of the computational effort.