An on-chip multi-mode buck DC-DC converter for fine-grain DVS on a multi-power domain soc using a 65-nm standard CMOS logic process

  • Authors:

  • Motoi Ichihashi;Hélène Lhermet;Edith Beigné;Frédéric Rothan;Marc Belleville;Amara Amara

  • Affiliations:

  • CEA-Léti, MINATEC, Grenoble, France;CEA-Léti, MINATEC, Grenoble, France;CEA-Léti, MINATEC, Grenoble, France;CEA-Léti, MINATEC, Grenoble, France;CEA-Léti, MINATEC, Grenoble, France;ISEP (Institut Supérieur d’Electronique de Paris), Paris, France

  • Venue:
  • PATMOS'09 Proceedings of the 19th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
  • Year:
  • 2009

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Abstract

In this paper, we propose an on-chip dc-dc buck converter for fine-grain dynamic voltage scaling (DVS) on a multi-power domain SoC. The proposed circuit converts from the I/O voltage to the required core operating voltage. This regulator is equipped with the programmable output buffer and the switching signal modulator according to the module operating condition. The proposed converter is fabricated with a 65-nm standard CMOS logic process within the area of 5 bonding pads. The maximum power efficiency is over 88%, and the leakage current in the deep stand-by mode is measured only 19 nA.