Embedded program timing analysis based on path clustering and architecture classification
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
The simulation and evaluation of dynamic voltage scaling algorithms
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Hard real-time scheduling for low-energy using stochastic data and DVS processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Real-time dynamic voltage scaling for low-power embedded operating systems
SOSP '01 Proceedings of the eighteenth ACM symposium on Operating systems principles
Energy efficient CMOS microprocessor design
HICSS '95 Proceedings of the 28th Hawaii International Conference on System Sciences
Dynamic and Aggressive Scheduling Techniques for Power-Aware Real-Time Systems
RTSS '01 Proceedings of the 22nd IEEE Real-Time Systems Symposium
IEEE Transactions on Parallel and Distributed Systems
Power-Aware Scheduling for Periodic Real-Time Tasks
IEEE Transactions on Computers
Power-Aware Scheduling for AND/OR Graphs in Real-Time Systems
IEEE Transactions on Parallel and Distributed Systems
On-Line Dynamic Voltage Scaling for Hard Real-Time Systems Using the EDF Algorithm
RTSS '04 Proceedings of the 25th IEEE International Real-Time Systems Symposium
Scheduling for reduced CPU energy
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
PACS'02 Proceedings of the 2nd international conference on Power-aware computer systems
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Real-time multimedia applications are usually played back many times. For those applications, the distribution of actual execution time is no longer unknown from the second playback. In this paper, we propose a novel dynamic voltage scaling (DVS) algorithm, called CLDVS, for scheduling real-time multimedia applications. In order to minimize energy consumption, CLDVS determines the processor's operating frequency and supply voltage using the distribution of actual execution time during a time interval at the beginning of the interval. For that, all active tasks in the time interval are identified and incrementally placed on the time vs. scaling factor space in order to reduce variations of the scaling factor for minimum energy consumption. Simulation experiments show CLDVS achieves enormous energy savings and outperforms the existing DVS algorithms with different dynamic workload characteristics.