Circuit implementation of a 300-MHz 64-bit second-generation CMOS Alpha CPU
Digital Technical Journal - Special 10th anniversary issue
Analytical energy dissipation models for low-power caches
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Continuous profiling: where have all the cycles gone?
Proceedings of the sixteenth ACM symposium on Operating systems principles
ProfileMe: hardware support for instruction-level profiling on out-of-order processors
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Power considerations in the design of the Alpha 21264 microprocessor
DAC '98 Proceedings of the 35th annual Design Automation Conference
Reducing power in high-performance microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
Dynamic IPC/clock rate optimization
Proceedings of the 25th annual international symposium on Computer architecture
Selective cache ways: on-demand cache resource allocation
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
IEEE Micro
Energy efficient CMOS microprocessor design
HICSS '95 Proceedings of the 28th Hawaii International Conference on System Sciences
The Alpha 21264 Microprocessor Architecture
ICCD '98 Proceedings of the International Conference on Computer Design
Managing multi-configuration hardware via dynamic working set analysis
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
Dynamically Trading Frequency for Complexity in a GALS Microprocessor
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
Proceedings of the 42nd annual Design Automation Conference
Exploiting Java through binary translation for low power embedded reconfigurable systems
SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
Integrated data relocation and bus reconfiguration for adaptive system-on-chip platforms
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Dynamic clustering for distinct parallel programming models on NoC-based MPSoCs
Proceedings of the 4th International Workshop on Network on Chip Architectures
Exploring resource mapping policies for dynamic clustering on NoC-based MPSoCs
Proceedings of the Conference on Design, Automation and Test in Europe
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By exploiting hardware partitioning and applying runtime reconfiguration techniques, microprocessor efficiency is significantly improved while retaining high clock speed, dense functionality, and conventional development tools