Runtime Reconfiguration Techniques for Efficient General-Purpose Computation
IEEE Design & Test
RASoC: A Router Soft-Core for Networks-on-Chip
Proceedings of the conference on Design, automation and test in Europe - Volume 3
A virtual platform for multiprocessor real-time embedded systems
JTRES '08 Proceedings of the 6th international workshop on Java technologies for real-time and embedded systems
DistRM: distributed resource management for on-chip many-core systems
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Dynamic clustering for distinct parallel programming models on NoC-based MPSoCs
Proceedings of the 4th International Workshop on Network on Chip Architectures
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The dramatic increase in the number of processors, memories and other components in the same chip calls for resource-aware mechanisms to improve performance. This paper proposes four different resource mapping policies for NoC-based MPSoCs that leverage on distinct aspects of the parallel nature of the applications and on architecture constraints, such as off-chip memory latency. Results show that the use of these policies can improve performance up to 22.5% in average, and, in some cases, depending on the parallel programming model of each application, the improvement may reach up to 32%.