Low power state assignment targeting two-and multi-level logic implementations
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
A survey of power estimation techniques in VLSI circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Instruction level power analysis and optimization of software
Journal of VLSI Signal Processing Systems - Special issue on technologies for wireless computing
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Sequential synthesis and optimization for low power
Low power design in deep submicron electronics
Energy efficient CMOS microprocessor design
HICSS '95 Proceedings of the 28th Hawaii International Conference on System Sciences
Partitioning of Hardware-Software Embedded Systems: A Metrics-based Approach
Integrated Computer-Aided Engineering
Activity-sensitive architectural power analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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The need for low-power embedded systems has become very significant within the microelectronics scenario in the most recent years. A power-driven methodology is mandatory during embedded systems design to meet system-level requirements while fulfilling time-to-market. The aim of this paper is to introduce accurate and efficient power metrics included in a hardware/software (HW/SW) codesign environment to guide the system-level partitioning. Power evaluation metrics have been defined to widely explore the architectural design space at high abstraction level. This is one of the first approaches that considers globally HW and SW contributions to power in a system-level design flow for control dominated embedded systems.