Scheduling Tasks with AND/OR Precedence Constraints
SIAM Journal on Computing
Data driven signal processing: an approach for energy efficient computing
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
A low-power design method using multiple supply voltages
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Dynamic power management based on continuous-time Markov decision processes
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Run-time voltage hopping for low-power real-time systems
Proceedings of the 37th Annual Design Automation Conference
Optimal Reward-Based Scheduling for Periodic Real-Time Tasks
IEEE Transactions on Computers
Inherently Lower-Power High-Performance Superscalar Architectures
IEEE Transactions on Computers
Improving dynamic voltage scaling algorithms with PACE
Proceedings of the 2001 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Energy priority scheduling for variable voltage processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Hard real-time scheduling for low-energy using stochastic data and DVS processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Variable voltage task scheduling algorithms for minimizing energy
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Real-time dynamic voltage scaling for low-power embedded operating systems
SOSP '01 Proceedings of the eighteenth ACM symposium on Operating systems principles
Scheduling in Computer and Manufacturing Systems
Scheduling in Computer and Manufacturing Systems
Software Cost Estimation with Cocomo II with Cdrom
Software Cost Estimation with Cocomo II with Cdrom
Proactive Power-Aware Cache Management for Mobile Computing Systems
IEEE Transactions on Computers
Intra-Task Voltage Scheduling for Low-Energy, Hard Real-Time Applications
IEEE Design & Test
Energy-Aware Runtime Scheduling for Embedded-Multiprocessor SOCs
IEEE Design & Test
Power management points in power-aware real-time systems
Power aware computing
Application-level power awareness
Power aware computing
A power-aware, satellite-based parallel signal processing scheme
Power aware computing
ET2: a metric for time and energy efficiency of computation
Power aware computing
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Energy efficient CMOS microprocessor design
HICSS '95 Proceedings of the 28th Hawaii International Conference on System Sciences
Predictive Strategies for Low-Power RTOS Scheduling
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
ECRTS '01 Proceedings of the 13th Euromicro Conference on Real-Time Systems
Adaptive Power-Fidelity in Energy-Aware Wireless Embedded Systems
RTSS '01 Proceedings of the 22nd IEEE Real-Time Systems Symposium
An Estimation and Simulation Framework for Energy Efficient Design using Platform FPGAs
FCCM '03 Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Power-Aware Scheduling for AND/OR Graphs in Real-Time Systems
IEEE Transactions on Parallel and Distributed Systems
Topology selection for energy minimization in embedded networks
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Energy efficient scheduling of parallel tasks on multiprocessor computers
The Journal of Supercomputing
The Journal of Supercomputing
An efficient energy and schedule length model for multiprocessor computers
International Journal of Computer Applications in Technology
On two-pronged power-aware voltage scheduling for multi-processor real-time systems
PATMOS'07 Proceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation
An optimal energy and power model for dynamic voltage scaled multiprocessor systems
International Journal of Business Information Systems
International Journal of Business Information Systems
| Hi-index | 14.98 |
Energy versus delay trade-offs are explored for systems that must manage energy expenditure as well as computation deadlines. The focus is execution of a single process on a single processor. Two probabilistic process models are considered, along with a family of power dissipation models. The first process model assumes that process complexity is exactly c cycles with probability p(c). The second model considers the detailed branching and loop structure of the code. Probabilities are attached at branch points. The power models assume that energy dissipation per cycle is proportional to v^m and that execution time for a cycle is proportional to v^{-n}, where v is supply voltage. The energy versus delay trade-off is implemented using dynamic voltage and clock adjustments. The problems solved include 1) minimize expected execution time given a hard energy budget and 2) minimize expected energy expenditure given a hard deadline. The problem of minimimizing the expected value of Q(E,T), where Q is a penalty function and E and T are, respectively, total energy and total time, is also solved using the first process model. Analysis determines theoretical conditions where it may be profitable to switch voltage or modify an a priori voltage schedule.