Improving dynamic voltage scaling algorithms with PACE

  • Authors:
  • Jacob R. Lorch;Alan Jay Smith

  • Affiliations:
  • Computer Science Division, EECS Department, University of California at Berkeley, Berkeley, CA;Computer Science Division, EECS Department, University of California at Berkeley, Berkeley, CA

  • Venue:
  • Proceedings of the 2001 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
  • Year:
  • 2001

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Abstract

This paper addresses algorithms for dynamically varying (scaling) CPU speed and voltage in order to save energy. Such scaling is useful and effective when it is immaterial when a task completes, as long as it meets some deadline. We show how to modify any scaling algorithm to keep performance the same but minimize expected energy consumption. We refer to our approach as PACE (Processor Acceleration to Conserve Energy) since the resulting schedule increases speed as the task progresses. Since PACE depends on the probability distribution of the task's work requirement, we present methods for estimating this distribution and evaluate these methods on a variety of real workloads. We also show how to approximate the optimal schedule with one that changes speed a limited number of times. Using PACE causes very little additional overhead, and yields substantial reductions in CPU energy consumption. Simulations using real workloads show it reduces the CPU energy consumption of previously published algorithms by up to 49.5%, with an average of 20.6%, without any effect on performance.