Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
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ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Real-time dynamic voltage scaling for low-power embedded operating systems
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ICS '02 Proceedings of the 16th international conference on Supercomputing
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FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
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RTAS '03 Proceedings of the The 9th IEEE Real-Time and Embedded Technology and Applications Symposium
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Energy-Efficient Policies for Request-Driven Soft Real-Time Systems
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Minimizing expected energy in real-time embedded systems
Proceedings of the 5th ACM international conference on Embedded software
Expected system energy consumption minimization in leakage-aware DVS systems
Proceedings of the 13th international symposium on Low power electronics and design
Energy-efficiency for multiframe real-time tasks on a dynamic voltage scaling processor
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A probabilistic and energy-efficient scheduling approach for online application in real-time systems
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Energy efficient multiprocessor task scheduling under input-dependent variation
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Optimal DPM and DVFS for frame-based real-time systems
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
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This paper deals with energy-aware real-time system scheduling using dynamic voltage scaling (DVS) for energy-constrained embedded systems that execute variable and unpredictable workloads. The goal is to design DVS schemes to minimize the expected energy consumption of the whole system while meeting the deadlines of the tasks. Researchers have attempted to take advantage of stochastic information about workloads to achieve better energy savings, and accordingly, various stochastic DVS schemes have been proposed. However, the existing stochastic DVS schemes are based on much simplified power models that assume unrestricted continuous frequency, well-defined power/frequency relation, and no speed change overhead. When these schemes are used in practice, they need to be patched in order to comply with realistic power models. Experiments show that some of such DVS schemes perform even worse than certain non-stochastic DVS schemes. Furthermore, even for stochastic schemes that were shown experimentally to outperform non-stochastic schemes, it is not clear how well they perform compared to the optimal solution, which is yet to be found. In this work, we provide a unified practical approach for obtaining optimal (or provably close to optimal) stochastic inter-task, intra-task, and hybrid DVS schemes under realistic power models in which the processor only provides a set of discrete speeds, no assumption is made on power/frequency relation, and speed change overhead is considered. We also evaluate the existing DVS schemes by comparing them with our DVS schemes.