Power prediction for intel XScale® processors using performance monitoring unit events

  • Authors:

  • Gilberto Contreras;Margaret Martonosi

  • Affiliations:

  • Princeton University, Princeton, NJ;Princeton University, Princeton, NJ

  • Venue:
  • ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
  • Year:
  • 2005

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Abstract

This paper demonstrates a first-order, linear power estimation model ha uses performance counters to estimate run-time CPU and memory power consumption of the Intel PXA255 processor. Our model uses a set of power weights that map hardware performance counter values to processor and memory power consumption. Power weights are derived offline once per processor voltage and frequency configuration using parameter estimation echniques. They can be applied in a dynamic voltage/frequency scaling environment by setting six descriptive parameters. We have tested our model using a wide selection of benchmarks including SPEC2000, Java CDC and Java CLDC programming environments. The accuracy is quite good; average estimated power consumption is within 4% of he measured average CPU power consumption. We believe such power estimation schemes can serve as a foundation for intelligent, power-aware embedded systems tha dynamically adapt to the device's power consumption