Processor energy characterization for compiler-assisted software energy reduction

  • Authors:
  • Lovic Gauthier;Tohru Ishihara

  • Affiliations:
  • Institute of System LSI Design Industry, Kyushu University, Fukuoka, Fukuoka, Japan;Department of Communications and Computer Engineering, Kyoto University, Kyoto, Japan

  • Venue:
  • Journal of Electrical and Computer Engineering
  • Year:
  • 2012

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Abstract

Energy consumption is a fundamental barrier in taking full advantage of today and future semiconductor manufacturing technologies. The paper presents our recent research activities and results on characterizing and reducing the energy consumption in embedded systems. Firstly, a technique for characterizing the energy consumption of embedded processors during an application execution is presented. The technique trains a per-processor linear approximation model for fitting it to the energy consumption of the processor obtained by postlayout simulation. Secondly, based on the energy model mentioned above, the paper shows techniques for reducing the energy consumption by optimally mapping program code, stack frames, and data items to the scratch-pad memory (SPM) of the processor memory space.