Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Power analysis of a 32-bit embedded microcontroller
ASP-DAC '95 Proceedings of the 1995 Asia and South Pacific Design Automation Conference
Computer Arithmetic: Principles, Architecture and Design
Computer Arithmetic: Principles, Architecture and Design
Saving Power in the Control Path of Embedded Processors
IEEE Design & Test
Techniques for low energy software
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Cycle-accurate energy consumption measurement and analysis: case study of ARM7TDMI
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Cycle-accurate energy measurement and characterization with a case study of the ARM7TDMI
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Reordering Memory Bus Transactions for Reduced Power Consumption
LCTES '00 Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems
Instruction Level Power Analysis and Optimization of Software
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Energy consumption analysis for two embedded Java virtual machines
Journal of Systems Architecture: the EUROMICRO Journal
Algorithms and analysis of scheduling for low-power high-performance DSP on VLIW processors
International Journal of High Performance Computing and Networking
Impact of JVM superoperators on energy consumption in resource-constrained embedded systems
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
Power consumption characterisation of the texas instruments TMS320VC5510 DSP
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Proceedings of the 9th conference on Computing Frontiers
Processor energy characterization for compiler-assisted software energy reduction
Journal of Electrical and Computer Engineering
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Abstract: This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been developed using this technique. Significant points of difference have been observed between this model and the ones developed earlier for some general-purpose commercial microprocessors. In particular, the effect of circuit state on the power cost of an instruction stream is more marked in the case of this DSP processor. In addition, the DSP processor has a special architectural feature that allows instructions to be packed into pairs. The energy reduction possible through the use of this feature is studied. The on-chip Booth multiplier on the processor is a major source of energy consumption for DSP programs. A micro-architectural power model for the multiplier is developed and analyzed for further energy minimization. A scheduling algorithm incorporating these new techniques is proposed to reduce the energy consumed by DSP software. Energy reductions varying from 11% to 56% have been observed for several example programs. These energy savings are real and have been verified through physical measurement.