Instruction Level Power Analysis and Optimization of Software

  • Authors:
  • Vivek Tiwari;Sharad Malik;Andrew Wolfe;Mike Tien-Chien Lee

  • Affiliations:
  • -;-;-;-

  • Venue:
  • VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
  • Year:
  • 1996

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Abstract

Software constitutes a major component of today's systems, and its role is projected to continue to grow. This motivates the need for analyzing power consumption from the point of view of software - something that circuit and gate level power analysis tools are inadequate for. This paper describes an alternative, measurement based instruction level power analysis approach that provides an accurate and practical way of quantifying this cost. This technique has been applied to three commercial, architecturally different microprocessors. This paper presents an overview of the salient results of these analyses. The ability to evaluate software in terms of power consumption makes it feasible to develop tools and techniques for low power software. Several ideas in this regard as suggested by the power analysis of the subject microprocessors are also summarized.