Expected system energy consumption minimization in leakage-aware DVS systems

  • Authors:
  • Jian-Jia Chen;Lothar Thiele

  • Affiliations:
  • Swiss Federal Institute of Technology (ETH) Zurich, Zurich, Switzerland;Swiss Federal Institute of Technology (ETH) Zurich, Zurich, Switzerland

  • Venue:
  • Proceedings of the 13th international symposium on Low power electronics and design
  • Year:
  • 2008

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Abstract

The pursuit of energy efficiency is becoming more and more important in hardware and software designs. This research explores energy-efficient scheduling for a periodic real-time task with uncertain execution time in dynamic voltage scaling (DVS) systems with non-negligible leakage/static power consumption. Distinct from the assumption of non-reducible static power consumption in the literature, this paper considers the possibility to reduce it by turning a processor to a dormant mode. We propose an algorithm to derive an optimal frequency assignment to minimize the expected energy consumption without procrastination, while another extended algorithm is developed to apply procrastination scheduling for further energy reduction. Experimental results show that the proposed algorithms can effectively minimize the expected energy consumption.