Realtime systems
The simulation and evaluation of dynamic voltage scaling algorithms
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Run-time voltage hopping for low-power real-time systems
Proceedings of the 37th Annual Design Automation Conference
Improving dynamic voltage scaling algorithms with PACE
Proceedings of the 2001 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Energy priority scheduling for variable voltage processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Patterns for time-triggered embedded systems: building reliable applications with the 8051 family of microcontrollers
Real-time dynamic voltage scaling for low-power embedded operating systems
SOSP '01 Proceedings of the eighteenth ACM symposium on Operating systems principles
Real-Time Systems and Software
Real-Time Systems and Software
Real-Time Systems: Design Principles for Distributed Embedded Applications
Real-Time Systems: Design Principles for Distributed Embedded Applications
Proceedings of the 2002 international symposium on Low power electronics and design
Embedded C
Jitter Control in Time-Triggered Systems
HICSS '96 Proceedings of the 29th Hawaii International Conference on System Sciences Volume 1: Software Technology and Architecture
Minimizing CAN Response-Time Jitter by Message Manipulation
RTAS '02 Proceedings of the Eighth IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'02)
Processor Voltage Scheduling for Real-Time Tasks with Non-Preemptible Sections
RTSS '02 Proceedings of the 23rd IEEE Real-Time Systems Symposium
Jitter Compensation for Real-Time Control Systems
RTSS '01 Proceedings of the 22nd IEEE Real-Time Systems Symposium
Designing embedded systems using patterns: a case study
Journal of Systems and Software - Special issue: Computer systems
Feedback EDF Scheduling Exploiting Dynamic Voltage Scaling
RTAS '04 Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium
Scheduling for reduced CPU energy
OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation
Proceedings of the 20th annual conference on Integrated circuits and systems design
Hard real-time tasks' scheduling considering voltage scaling, precedence and exclusion relations
Information Processing Letters
SAFECOMP '08 Proceedings of the 27th international conference on Computer Safety, Reliability, and Security
Microprocessors & Microsystems
A hybrid DVS scheduling approach for hard real-time systems
SMC'09 Proceedings of the 2009 IEEE international conference on Systems, Man and Cybernetics
Computer assisted source-code parallelisation
ICCSA'06 Proceedings of the 2006 international conference on Computational Science and Its Applications - Volume Part V
Meeting real-time constraints using “sandwich delays”
Transactions on Pattern Languages of Programming I
Proceedings of the 15th European Conference on Pattern Languages of Programs
| Hi-index | 14.98 |
We have previously demonstrated that use of an appropriate Dynamic Voltage Scaling (DVS) algorithm can lead to a substantial reduction in CPU power consumption in systems employing a time-triggered cooperative (TTC) scheduler. In this paper, we consider the impact that the use of DVS has on the levels of both clock and task jitter in TTC applications. We go on to describe a modified DVS algorithm (TTC-jDVS) which can be used where low jitter is an important design consideration. We then demonstrate the effectiveness of the modified algorithm on a data set made up of artificial tasks and in a realistic case study.