Application-directed voltage scaling

  • Authors:

  • Johan Pouwelse;Koen Langendoen;Henk J. Sips

  • Affiliations:

  • Faculty of Information Technology and Systems, Delft University of Technology, The Netherlands;Faculty of Information Technology and Systems, Delft University of Technology, The Netherlands;Faculty of Information Technology and Systems, Delft University of Technology, The Netherlands

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
  • Year:
  • 2003

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Abstract

Clock (and voltage) scheduling is an important technique to reduce the energy consumption of processors that support voltage scaling. It is difficult, however, to achieve good results using only statistics from the operating system level when applications show bursty (unpredictable) behavior. We take the approach that such applications must be made power-aware and specify their average execution time (AET) and the deadline to the scheduler controlling the clock speed and processor voltage. This paper describes our energy priority scheduling (EPS) algorithm supporting power-aware applications. EPS orders tasks according to how tight their deadlines are and how often tasks overlap. Low-priority tasks are scheduled first, since they can be easily preempted to accommodate for high-priority tasks later. The EPS algorithm does not always yield the optimal schedule, but has a low complexity. We have implemented EPS on a StrongARM-based variable-voltage platform. We conducted experiments with a modified video decoder that estimates the AET of each frame. Measurements show that application-directed voltage scaling reduces processor power consumption with 50% for the bursty video decoder without missing any frame deadlines.