Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
ARM System-on-Chip Architecture
ARM System-on-Chip Architecture
ACISP '01 Proceedings of the 6th Australasian Conference on Information Security and Privacy
Resistance against Differential Power Analysis for Elliptic Curve Cryptosystems
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Modern Cryptography: Theory and Practice
Modern Cryptography: Theory and Practice
VLSID '00 Proceedings of the 13th International Conference on VLSI Design
Application-directed voltage scaling
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Security in embedded systems: Design challenges
ACM Transactions on Embedded Computing Systems (TECS)
ACM Transactions on Embedded Computing Systems (TECS)
Current Flattening in Software and Hardware for Security Applications
CODES+ISSS '04 Proceedings of the international conference on Hardware/Software Codesign and System Synthesis: 2004
Improving security for periodic tasks in embedded systems through scheduling
ACM Transactions on Embedded Computing Systems (TECS)
TSV: A novel energy efficient Memory Integrity Verification scheme for embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
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In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provides support for masking these channels by controlling, in real-time, the power and the current consumption of a system to predefined programmable values. The main components of the architecture are a processor core, a current sensor module, a dynamically controlled power supply module, a clock frequency control module, and a current injection module. Real-time current measurements and power-aware voltage control are used in closed loop architecture to regulate and minimize the total power consumption of the system. Simulation results show that the current consumption of the system can be regulated to a reference level with reduced power-to-security trade off (power overhead less than 12% of the total power).