ACM Transactions on Computer Systems (TOCS)
ABYSS: An Architecture for Software Protection
IEEE Transactions on Software Engineering
Working sets, cache sizes, and node granularity issues for large-scale multiprocessors
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Performance Analysis of Cache Memories
Journal of the ACM (JACM)
The working set model for program behavior
Communications of the ACM
Analytical cache models with applications to cache partitioning
ICS '01 Proceedings of the 15th international conference on Supercomputing
Architectural support for copy and tamper resistant software
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
The Design of Rijndael
Caches and Hash Trees for Efficient Memory Integrity Verification
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Analyzing the energy consumption of security protocols
Proceedings of the 2003 international symposium on Low power electronics and design
Efficient Memory Integrity Verification and Encryption for Secure Processors
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Automatic Tuning of Two-Level Caches to Embedded Applications
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Low energy security optimization in embedded cryptographic systems
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
HIDE: an infrastructure for efficiently protecting information leakage on the address bus
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques
Power-smart system-on-chip architecture for embedded cryptosystems
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
IEEE Transactions on Computers
Architecture Support for 3D Obfuscation
IEEE Transactions on Computers
Improving Cost, Performance, and Security of Memory Encryption and Authentication
Proceedings of the 33rd annual international symposium on Computer Architecture
IEEE Transactions on Software Engineering
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture
Aegis: A Single-Chip Secure Processor
IEEE Design & Test
Relating Boolean gate truth tables to one-way functions
Integrated Computer-Aided Engineering
Energy Efficient Memory Authentication Mechanism in Embedded Systems
ISED '11 Proceedings of the 2011 International Symposium on Electronic System Design
Arc3D: a 3D obfuscation architecture
HiPEAC'05 Proceedings of the First international conference on High Performance Embedded Architectures and Compilers
TIVA: trusted integrity verification architecture
DRMTICS'05 Proceedings of the First international conference on Digital Rights Management: technologies, Issues, Challenges and Systems
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Embedded systems are ubiquitous in this era of portable computing. These systems are empowered to access, store and transmit abundance of critical information. Thus their security becomes a prime concern. Moreover, most of these embedded devices often have to operate under insecure environments where the adversary may acquire physical access. To provide security, cryptographic security mechanisms could be employed in embedded systems. However, these mechanisms consume excessive energy that cannot be tolerated by the embedded systems. Therefore with the focus on achieving energy efficiency in cryptographic Memory Integrity Verification (MIV) mechanism, we present a novel energy efficient approach called Timestamps Verification (TSV) to provide Memory Integrity Verification in embedded systems. This paper elaborates the proposed approach along with its theoretical evaluation, simulation results, and experimental evaluation. The results prove that the energy savings in the TSV approach are in the range of 36-81% when compared with traditional MIV mechanisms.