Checking the correctness of memories
SFCS '91 Proceedings of the 32nd annual symposium on Foundations of computer science
Building a high-performance, programmable secure coprocessor
Computer Networks: The International Journal of Computer and Telecommunications Networking - Special issue on computer network security
Architectural support for copy and tamper resistant software
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Stack and Queue Integrity on Hostile Platforms
IEEE Transactions on Software Engineering
XOR MACs: New Methods for Message Authentication Using Finite Pseudorandom Functions
CRYPTO '95 Proceedings of the 15th Annual International Cryptology Conference on Advances in Cryptology
Low Cost Attacks on Tamper Resistant Devices
Proceedings of the 5th International Workshop on Security Protocols
How to Manage Persistent State in DRM Systems
DRM '01 Revised Papers from the ACM CCS-8 Workshop on Security and Privacy in Digital Rights Management
Controlled Physical Random Functions
ACSAC '02 Proceedings of the 18th Annual Computer Security Applications Conference
How to build a trusted database system on untrusted storage
OSDI'00 Proceedings of the 4th conference on Symposium on Operating System Design & Implementation - Volume 4
AEGIS: architecture for tamper-evident and tamper-resistant processing
ICS '03 Proceedings of the 17th annual international conference on Supercomputing
Specifying and Verifying Hardware for Tamper-Resistant Software
SP '03 Proceedings of the 2003 IEEE Symposium on Security and Privacy
Implementing an untrusted operating system on trusted hardware
SOSP '03 Proceedings of the nineteenth ACM symposium on Operating systems principles
Efficient Memory Integrity Verification and Encryption for Secure Processors
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Fast Secure Processor for Inhibiting Software Piracy and Tampering
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Repairing return address stack for buffer overflow protection
Proceedings of the 1st conference on Computing frontiers
Hardware assisted control flow obfuscation for embedded processors
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
HIDE: an infrastructure for efficiently protecting information leakage on the address bus
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques
Attacks and risk analysis for hardware supported software copy protection systems
Proceedings of the 4th ACM workshop on Digital rights management
Building Intrusion-Tolerant Secure Software
Proceedings of the international symposium on Code generation and optimization
Improving Memory Encryption Performance in Secure Processors
IEEE Transactions on Computers
Towards the issues in architectural support for protection of software execution
ACM SIGARCH Computer Architecture News - Special issue: Workshop on architectural support for security and anti-virus (WASSA)
Protecting cryptographic keys and computations via virtual secure coprocessing
ACM SIGARCH Computer Architecture News - Special issue: Workshop on architectural support for security and anti-virus (WASSA)
Architectural support for protecting user privacy on trusted processors
ACM SIGARCH Computer Architecture News - Special issue: Workshop on architectural support for security and anti-virus (WASSA)
A combined hardware and software architecture for secure computing
Proceedings of the 2nd conference on Computing frontiers
Architecture for Protecting Critical Secrets in Microprocessors
Proceedings of the 32nd annual international symposium on Computer Architecture
Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions
Proceedings of the 32nd annual international symposium on Computer Architecture
A Data-Driven Approach for Embedded Security
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Compiler Optimizations to Reduce Security Overhead
Proceedings of the International Symposium on Code Generation and Optimization
Improving Cost, Performance, and Security of Memory Encryption and Authentication
Proceedings of the 33rd annual international symposium on Computer Architecture
A parallelized way to provide data encryption and integrity checking on a processor-memory bus
Proceedings of the 43rd annual Design Automation Conference
A low-cost memory remapping scheme for address bus protection
Proceedings of the 15th international conference on Parallel architectures and compilation techniques
Efficient data protection for distributed shared memory multiprocessors
Proceedings of the 15th international conference on Parallel architectures and compilation techniques
Virtual monotonic counters and count-limited objects using a TPM without a trusted OS
Proceedings of the first ACM workshop on Scalable trusted computing
SecCMP: a secure chip-multiprocessor architecture
Proceedings of the 1st workshop on Architectural and system support for improving software dependability
Authentication Control Point and Its Implications For Secure Processor Design
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
M-TREE: a high efficiency security architecture for protecting integrity and privacy of software
Journal of Parallel and Distributed Computing - Special issue: Security in grid and distributed systems
Controlled physical random functions and applications
ACM Transactions on Information and System Security (TISSEC)
Aegis: A Single-Chip Secure Processor
IEEE Design & Test
TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
A fast real-time memory authentication protocol
Proceedings of the 3rd ACM workshop on Scalable trusted computing
Making secure processors OS- and performance-friendly
ACM Transactions on Architecture and Code Optimization (TACO)
Memory-Centric Security Architecture
Transactions on High-Performance Embedded Architectures and Compilers I
Supporting flexible streaming media protection through privacy-aware secure processors
Computers and Electrical Engineering
Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines
Transactions on Computational Science IV
Compiler-Assisted Memory Encryption for Embedded Processors
Transactions on High-Performance Embedded Architectures and Compilers II
Relating Boolean gate truth tables to one-way functions
Integrated Computer-Aided Engineering
Protect Disk Integrity: Solid Security, Fine Performance and Fast Recovery
ISA '09 Proceedings of the 3rd International Conference and Workshops on Advances in Information Security and Assurance
MAC Precomputation with Applications to Secure Memory
ISC '09 Proceedings of the 12th International Conference on Information Security
Efficient, secure, and isolated execution of cryptographic algorithms on a cryptographic unit
Proceedings of the 2nd international conference on Security of information and networks
AEGIS: A single-chip secure processor
Information Security Tech. Report
A low-cost memory remapping scheme for address bus protection
Journal of Parallel and Distributed Computing
Compiler-assisted memory encryption for embedded processors
HiPEAC'07 Proceedings of the 2nd international conference on High performance embedded architectures and compilers
Secure cryptographic precomputation with insecure memory
ISPEC'08 Proceedings of the 4th international conference on Information security practice and experience
SHIELDSTRAP: making secure processors truly secure
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
A session key caching and prefetching scheme for secure communication in cluster systems
Journal of Parallel and Distributed Computing
Super-efficient aggregating history-independent persistent authenticated dictionaries
ESORICS'09 Proceedings of the 14th European conference on Research in computer security
IVEC: off-chip memory integrity protection for both security and reliability
Proceedings of the 37th annual international symposium on Computer architecture
SecBus: operating system controlled hierarchical page-based memory bus protection
Proceedings of the Conference on Design, Automation and Test in Europe
An analysis of secure processor architectures
Transactions on computational science VII
InstantCheck: Checking the Determinism of Parallel Programs Using On-the-Fly Incremental Hashing
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Transactions on computational science X
Green secure processors: towards power-efficient secure processor design
Transactions on computational science X
SecureME: a hardware-software approach to full system security
Proceedings of the international conference on Supercomputing
Authenticated Dictionaries: Real-World Costs and Trade-Offs
ACM Transactions on Information and System Security (TISSEC)
Hash caching mechanism in source-based routing for wireless ad hoc networks
Journal of Network and Computer Applications
An operating system design for the security architecture for microprocessors
ICICS'06 Proceedings of the 8th international conference on Information and Communications Security
A cache design for a security architecture for microprocessors (SAM)
ARCS'06 Proceedings of the 19th international conference on Architecture of Computing Systems
An efficient way to build secure disk
ISPEC'06 Proceedings of the Second international conference on Information Security Practice and Experience
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Inspection resistant memory: architectural support for security from physical examination
Proceedings of the 39th Annual International Symposium on Computer Architecture
A cost-effective tag design for memory data authentication in embedded systems
Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
Configurable memory security in embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the ACM International Conference on Computing Frontiers
Design space exploration and optimization of path oblivious RAM in secure processors
Proceedings of the 40th Annual International Symposium on Computer Architecture
TSV: A novel energy efficient Memory Integrity Verification scheme for embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
Proceedings of the Twenty-Fourth ACM Symposium on Operating Systems Principles
ACM SIGOPS 24th Symposium on Operating Systems Principles
Authenticated storage using small trusted hardware
Proceedings of the 2013 ACM workshop on Cloud computing security workshop
Verifying computations with state
Proceedings of the Twenty-Fourth ACM Symposium on Operating Systems Principles
| Hi-index | 0.00 |
We study the hardware cost f implementing hash-tree based verification of untrusted external memory by a high performance processor.This verification could enable applications such as certified program execution.A number of schemes are presented with different levels of integration between the on-processor L2 cache and the hash-tree machinery. Simulations show that for the best ofour methods, the performance overhead is less than 25%, a significant decrease from the 10脳 overhead of a naive implementation.