Security for computer networks: and introduction to data security in teleprocessing and electronic funds transfer (2nd ed.)
Hardware protection against software piracy
Communications of the ACM
Frequent value locality and value-centric data cache design
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Architectural support for copy and tamper resistant software
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Architectural support for fast symmetric-key cryptography
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
CryptoManiac: a fast flexible architecture for secure communication
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Silent Stores and Store Value Locality
IEEE Transactions on Computers
Cryptography and Network Security: Principles and Practice
Cryptography and Network Security: Principles and Practice
Watermarking, tamper-proffing, and obfuscation: tools for software protection
IEEE Transactions on Software Engineering
Using a High-Performance, Programmable Secure Coprocessor
FC '98 Proceedings of the Second International Conference on Financial Cryptography
Caches and Hash Trees for Efficient Memory Integrity Verification
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Specifying and Verifying Hardware for Tamper-Resistant Software
SP '03 Proceedings of the 2003 IEEE Symposium on Security and Privacy
Hardware assisted control flow obfuscation for embedded processors
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
HIDE: an infrastructure for efficiently protecting information leakage on the address bus
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques
Attacks and risk analysis for hardware supported software copy protection systems
Proceedings of the 4th ACM workshop on Digital rights management
Hardware and Binary Modification Support for Code Pointer Protection From Buffer Overflow
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
Minos: Control Data Attack Prevention Orthogonal to Memory Model
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
Building Intrusion-Tolerant Secure Software
Proceedings of the international symposium on Code generation and optimization
Improving Memory Encryption Performance in Secure Processors
IEEE Transactions on Computers
Towards the issues in architectural support for protection of software execution
ACM SIGARCH Computer Architecture News - Special issue: Workshop on architectural support for security and anti-virus (WASSA)
Memory predecryption: hiding the latency overhead of memory encryption
ACM SIGARCH Computer Architecture News - Special issue: Workshop on architectural support for security and anti-virus (WASSA)
Architectural support for protecting user privacy on trusted processors
ACM SIGARCH Computer Architecture News - Special issue: Workshop on architectural support for security and anti-virus (WASSA)
High Efficiency Counter Mode Security Architecture via Prediction and Precomputation
Proceedings of the 32nd annual international symposium on Computer Architecture
Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions
Proceedings of the 32nd annual international symposium on Computer Architecture
A Data-Driven Approach for Embedded Security
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Hardware support for code integrity in embedded processors
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
Improving Cost, Performance, and Security of Memory Encryption and Authentication
Proceedings of the 33rd annual international symposium on Computer Architecture
A low-cost memory remapping scheme for address bus protection
Proceedings of the 15th international conference on Parallel architectures and compilation techniques
Efficient data protection for distributed shared memory multiprocessors
Proceedings of the 15th international conference on Parallel architectures and compilation techniques
SecCMP: a secure chip-multiprocessor architecture
Proceedings of the 1st workshop on Architectural and system support for improving software dependability
Minos: Architectural support for protecting control data
ACM Transactions on Architecture and Code Optimization (TACO)
Authentication Control Point and Its Implications For Secure Processor Design
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
M-TREE: a high efficiency security architecture for protecting integrity and privacy of software
Journal of Parallel and Distributed Computing - Special issue: Security in grid and distributed systems
Accelerating memory decryption and authentication with frequent value prediction
Proceedings of the 4th international conference on Computing frontiers
Making secure processors OS- and performance-friendly
ACM Transactions on Architecture and Code Optimization (TACO)
Designing robust copy protection for software products
CompSysTech '08 Proceedings of the 9th International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing
A security approach for off-chip memory in embedded microprocessor systems
Microprocessors & Microsystems
Memory-Centric Security Architecture
Transactions on High-Performance Embedded Architectures and Compilers I
Supporting flexible streaming media protection through privacy-aware secure processors
Computers and Electrical Engineering
Diversification of Processors Based on Redundancy in Instruction Set
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Compiler-Assisted Memory Encryption for Embedded Processors
Transactions on High-Performance Embedded Architectures and Compilers II
Security extensions for integrity and confidentiality in embedded processors
Microprocessors & Microsystems
Execution leases: a hardware-supported mechanism for enforcing strong non-interference
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
A low-cost memory remapping scheme for address bus protection
Journal of Parallel and Distributed Computing
Compiler-assisted memory encryption for embedded processors
HiPEAC'07 Proceedings of the 2nd international conference on High performance embedded architectures and compilers
Secure cryptographic precomputation with insecure memory
ISPEC'08 Proceedings of the 4th international conference on Information security practice and experience
SHIELDSTRAP: making secure processors truly secure
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
An analysis of secure processor architectures
Transactions on computational science VII
Green secure processors: towards power-efficient secure processor design
Transactions on computational science X
SecureME: a hardware-software approach to full system security
Proceedings of the international conference on Supercomputing
DynaPoMP: dynamic policy-driven memory protection for SPM-based embedded systems
WESS '11 Proceedings of the Workshop on Embedded Systems Security
Remote software-based attestation for wireless sensors
ESAS'05 Proceedings of the Second European conference on Security and Privacy in Ad-Hoc and Sensor Networks
Memory-centric security architecture
HiPEAC'05 Proceedings of the First international conference on High Performance Embedded Architectures and Compilers
Efficient architectural support for secure bus-based shared memory multiprocessor
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
Memory encryption for smart cards
CARDIS'11 Proceedings of the 10th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Applications
Bus and memory protection through chain-generated and tree-verified IV for multiprocessors systems
Future Generation Computer Systems
Proceedings of the ACM International Conference on Computing Frontiers
Design space exploration and optimization of path oblivious RAM in secure processors
Proceedings of the 40th Annual International Symposium on Computer Architecture
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Due to the widespread software piracy and virus attacks,significant efforts have been made to improve security forcomputer systems. For stand-alone computers, a key observationis that other than the processor, any component isvulnerable to security attacks. Recently, an execution onlymemory (XOM) architecture has been proposed to supportcopy and tamper resistant software [18, 17, 13]. In this design,the program and data are stored in encrypted formatoutside the CPU boundary. The decryption is carried afterthey are fetched from memory, and before they are used bythe CPU. As a result, the lengthened critical path causes aserious performance degradation.In this paper, we present an innovative technique inwhich the cryptography computation is shifted off from thememory access critical path. We propose to use a differentencryption scheme, namely "one-time pad" encryption, toproduce the instructions and data ciphertext. With someadditional on-chip storage, cryptography computations arecarried in parallel with memory accesses, minimizing performancepenalty. We performed experiments to study thetrade-off between storage size and performance penalty.Our technique improves the execution speed of the XOMarchitecture by 34.7% at maximum.