Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Modulation scaling for Energy Aware Communication Systems
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Critical power slope: understanding the runtime effects of frequency scaling
ICS '02 Proceedings of the 16th international conference on Supercomputing
SODA '03 Proceedings of the fourteenth annual ACM-SIAM symposium on Discrete algorithms
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Online strategies for dynamic power management in systems with multiple power-saving states
ACM Transactions on Embedded Computing Systems (TECS)
Application-directed voltage scaling
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Leakage aware dynamic voltage scaling for real-time embedded systems
Proceedings of the 41st annual Design Automation Conference
PACE: A New Approach to Dynamic Voltage Scaling
IEEE Transactions on Computers
Disk drive energy optimization for audio-video applications
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
DLS: dynamic backlight luminance scaling of liquid crystal display
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy optimization for a two-device data flow chain
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Policy optimization for dynamic power management
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Stochastic modeling of a power-managed system-construction and optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Procrastinating voltage scheduling with discrete frequency sets
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Energy optimal speed control of a producer--consumer device pair
ACM Transactions on Embedded Computing Systems (TECS) - Special Section LCTES'05
Energy-efficient dynamic task scheduling algorithms for DVS systems
ACM Transactions on Embedded Computing Systems (TECS)
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We obtain analytically, the energy optimal speed profile of a generic multi-speed device with a discrete set of speeds, to execute a given task within a given time. Current implementations of energy efficient speed control policies (including DVFS) almost exclusively use the minimum feasible speed pair, which has been shown before to be suboptimal. Unlike previous works, ours does not require an explicit functional relationship between the device's power and speed (e.g. the CMOS power model), but only assumes that the power-speed relationship is a W-convex (a discrete equivalent of a convex) function. This assumption allowed us to show that the optimal speed profile uses at most two speeds, and that all the essential characteristics of the power-speed relationship can be encapsulated within a single speed, ωu. The latter speed is intrinsic to the device (i.e. task independent) and can be readily computed from its power-speed values (without any curve fit). Further, ωu is also the speed at which the the device consumes the least energy per unit work done. The problem formulation reduces to a linear program in the number of supported speeds, which in general, is difficult to solve analytically. However, the optimum solution has a very simple form - it is either ωu, or the minimum feasible speed pair for the given task. We verified that a number of commercial DVFS processors, and other devices like disk drives satisfied our model of the W-convex power-speed relationship.