Power conscious fixed priority scheduling for hard real-time systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Low-energy intra-task voltage scheduling using static timing analysis
Proceedings of the 38th annual Design Automation Conference
Energy efficient fixed-priority scheduling for real-time systems on variable voltage processors
Proceedings of the 38th annual Design Automation Conference
Hard real-time scheduling for low-energy using stochastic data and DVS processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
A profile-based energy-efficient intra-task voltage scheduling algorithm for real-time applications
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Real-time dynamic voltage scaling for low-power embedded operating systems
SOSP '01 Proceedings of the eighteenth ACM symposium on Operating systems principles
Real-Time Systems
Power optimization of real-time embedded systems on variable speed processors
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
SODA '03 Proceedings of the fourteenth annual ACM-SIAM symposium on Discrete algorithms
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Voltage-Clock-Scaling Adaptive Scheduling Techniques for Low Power in Hard Real-Time Systems
RTAS '00 Proceedings of the Sixth IEEE Real Time Technology and Applications Symposium (RTAS 2000)
Performance Comparison of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems
RTAS '02 Proceedings of the Eighth IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'02)
Dynamic voltage scaling algorithm for fixed-priority real-time systems using work-demand analysis
Proceedings of the 2003 international symposium on Low power electronics and design
Proceedings of the conference on Design, automation and test in Europe
Dynamic and Aggressive Scheduling Techniques for Power-Aware Real-Time Systems
RTSS '01 Proceedings of the 22nd IEEE Real-Time Systems Symposium
Profile-based optimal intra-task voltage scheduling for hard real-time applications
Proceedings of the 41st annual Design Automation Conference
Leakage aware dynamic voltage scaling for real-time embedded systems
Proceedings of the 41st annual Design Automation Conference
Theoretical and practical limits of dynamic voltage scaling
Proceedings of the 41st annual Design Automation Conference
Dynamic voltage scaling for systemwide energy minimization in real-time embedded systems
Proceedings of the 2004 international symposium on Low power electronics and design
Memory-aware energy-optimal frequency assignment for dynamic supply voltage scaling
Proceedings of the 2004 international symposium on Low power electronics and design
Preemption-aware dynamic voltage scaling in hard real-time systems
Proceedings of the 2004 international symposium on Low power electronics and design
Dynamic slack reclamation with procrastination scheduling in real-time embedded systems
Proceedings of the 42nd annual Design Automation Conference
System-level energy-efficient dynamic task scheduling
Proceedings of the 42nd annual Design Automation Conference
DC-DC converter-aware power management for battery-operated embedded systems
Proceedings of the 42nd annual Design Automation Conference
Energy optimal speed control of devices with discrete speed sets
Proceedings of the 42nd annual Design Automation Conference
An optimal solution for the heterogeneous multiprocessor single-level voltage-setup problem
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
CCGRID '10 Proceedings of the 2010 10th IEEE/ACM International Conference on Cluster, Cloud and Grid Computing
Energy-efficient scheduling of real-time periodic tasks in multicore systems
NPC'10 Proceedings of the 2010 IFIP international conference on Network and parallel computing
Some observations on optimal frequency selection in DVFS-based energy consumption minimization
Journal of Parallel and Distributed Computing
Modeling the energy consumption for concurrent executions of parallel tasks
Proceedings of the 14th Communications and Networking Symposium
Energy efficient scheduling of parallel tasks on multiprocessor computers
The Journal of Supercomputing
The Journal of Supercomputing
An experimental evaluation of real-time DVFS scheduling algorithms
Proceedings of the 5th Annual International Systems and Storage Conference
Analytical modeling and simulation of the energy consumption of independent tasks
Proceedings of the Winter Simulation Conference
Energy and transition-aware runtime task scheduling for multicore processors
Journal of Parallel and Distributed Computing
MELOADES: Methodology for long-term online adaptation of embedded software for heterogeneous devices
Journal of Systems Architecture: the EUROMICRO Journal
A survey on techniques for improving the energy efficiency of large-scale distributed systems
ACM Computing Surveys (CSUR)
| Hi-index | 0.00 |
Dynamic voltage scaling (DVS) is a well-known low-power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time. However, in a DVS system consisting of a DVS processor and multiple devices, slowing down the processor increases the device energy consumption and thereby the system-level energy consumption. In this paper, we first use system-level energy consideration to derive the “optimal ” scaling factor by which a task should be scaled if there are no deadline constraints. Next, we develop dynamic task-scheduling algorithms that make use of dynamic processor utilization and optimal scaling factor to determine the speed setting of a task. We present algorithm duEDF, which reduces the CPU energy consumption and algorithm duSYS and its reduced preemption version, duSYS_PC, which reduce the system-level energy. Experimental results on the video-phone task set show that when the CPU power is dominant, algorithm duEDF results in up to 45&percent; energy savings compared to the non-DVS case. When the CPU power and device power are comparable, algorithms duSYS and duSYS_PC achieve up to 25&percent; energy saving compared to CPU energy-efficient algorithm duEDF, and up to 12&percent; energy saving over the non-DVS scheduling algorithm. However, if the device power is large compared to the CPU power, then we show that a DVS scheme does not result in lowest energy. Finally, a comparison of the performance of algorithms duSYS and duSYS_PC show that preemption control has minimal effect on system-level energy reduction.