Knapsack problems: algorithms and computer implementations
Knapsack problems: algorithms and computer implementations
ILP-based cost-optimal DSP synthesis with module selection and data format conversion
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Local Microcode Compaction Techniques
ACM Computing Surveys (CSUR)
Energy efficient fixed-priority scheduling for real-time systems on variable voltage processors
Proceedings of the 38th annual Design Automation Conference
Fixed-priority preemptive multiprocessor scheduling: to partition or not to partition
RTCSA '00 Proceedings of the Seventh International Conference on Real-Time Systems and Applications
Energy-Aware Partitioning for Multiprocessor Real-Time Systems
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
IEEE Transactions on Parallel and Distributed Systems
Exploring Efficient Operating Points for Voltage Scaled Embedded Processor Cores
RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
Power-Aware Scheduling for Periodic Real-Time Tasks
IEEE Transactions on Computers
Task Partitioning Upon Heterogeneous Multiprocessor Platforms
RTAS '04 Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium
Approaching the Maximum Energy Saving on Embedded Systems with Multiple Voltages
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Processor Frequency Selection for SoC Platforms for Multimedia Applications
RTSS '04 Proceedings of the 25th IEEE International Real-Time Systems Symposium
Energy management for commodity short-bit-width microcontrollers
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Leakage-Aware Energy-Efficient Scheduling of Real-Time Tasks in Multiprocessor Systems
RTAS '06 Proceedings of the 12th IEEE Real-Time and Embedded Technology and Applications Symposium
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Multiprocessor synthesis for periodic hard real-time tasks under a given energy constraint
Proceedings of the conference on Design, automation and test in Europe: Proceedings
ACM Transactions on Embedded Computing Systems (TECS)
ACM Transactions on Embedded Computing Systems (TECS)
Energy-efficient dynamic task scheduling algorithms for DVS systems
ACM Transactions on Embedded Computing Systems (TECS)
Energy-Aware Scheduling for Streaming Applications on Chip Multiprocessors
RTSS '07 Proceedings of the 28th IEEE International Real-Time Systems Symposium
ISQED '08 Proceedings of the 9th international symposium on Quality Electronic Design
Tools & toys: Pleo, the Poop-Free Pet
IEEE Spectrum
A unified approach to variable voltage scheduling for nonideal DVS processors
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Scheduling of stream-based real-time applications for heterogeneous systems
Proceedings of the 2011 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
Energy-efficient deadline scheduling for heterogeneous systems
Journal of Parallel and Distributed Computing
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A heterogeneous multiprocessor (HeMP) system consists of several heterogeneous processors, each of which is specially designed to deliver the best energy-saving performance for a particular category of applications. A low-power real-time scheduling algorithm is required to schedule tasks on such a system to minimize its energy consumption and complete all tasks by their deadlines. Existing works assume that processor speeds are known as a priori and cannot deliver the optimal energy-saving performance. The problem of determining the optimal voltage for each processor to minimize the total energy consumption is called a voltage-setup problem. To the best of our knowledge, this is the first paper to propose the optimal solution for the HeMP single-level voltage-setup problem. This paper provides an optimal solution for the HeMP single-level voltage-setup problem. We first formulate the problem as a nonlinear generalized assignment problem that has been proved to be nondeterministic polynomial-time hard (NP-hard). We next develop a pruning-based algorithm to obtain the optimal solution. A heuristic algorithm is also proposed to derive an approximate solution. After obtaining the optimal partition, each processor's speed is determined by its final workload. In our simulations, wemodel more than a couple dozens of off-the-shelf embedded processors including ARM processor and TI DSP. The results show that the pruning-based algorithm reduces the time needed to derive the optimal solution by at least 98%, compared with the exhaustive search. Also, our heuristic algorithm achieves the minimum energy consumption over existing works.